Floating-Point Exception Logic for Unfused Multiply-Accumulate Precision

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Solution Overview

Problem

In floating-point processing systems, unfused multiply-accumulate operations can lead to loss of exception bits due to rounding and subsequent operations clearing accrued exception bits, which does not accurately reflect the occurrence of exceptions during the multiply operation.

Innovation Solution

A processor with a floating-point unit and exception logic that captures the floating-point exception state after the multiply sub-operation and updates the storage to reflect the exception state after the unfused multiply-accumulate instruction commits, ensuring that accrued exception bits accurately represent exceptions occurring during the multiply operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If unfused multiply-accumulate operations are performed with independent rounding after each sub-operation, then rounding precision is improved, but exception bit accuracy deteriorates because subsequent operations can clear accrued exception bits from previous operations

Engineering Contradiction:
Improverounding precisionVSAvoidexception bit accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The exception handling is segmented into capturing the exception state after the multiply sub-operation separately from the accumulate sub-operation. The exception logic captures the floating-point exception state at the intermediate point between multiply and accumulate, preserving the exception information that would otherwise be lost when subsequent operations clear the accrued exception bits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The exception state is captured preliminarily after the multiply sub-operation completes but before the accumulate sub-operation begins. This preliminary capture ensures that exception bits are recorded before the subsequent accumulate operation could potentially clear them, preserving the accuracy of exception information while maintaining independent rounding for each operation.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If accrued exception bits are updated by simply OR-ing present accrued exception bit value with current exception bit value, then update simplicity is improved, but exception information accuracy deteriorates because it does not reflect the actual exception state after multiply operation

Engineering Contradiction:
Improveexception bit update complexityVSAvoidexception information accuracy
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

An intermediary exception logic component is introduced that captures the floating-point exception state at the intermediate point after multiply and before accumulate. This intermediary capture mechanism serves as a mediator between the multiply and accumulate operations, preserving exception information that would otherwise be lost in the simple OR-ing update process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The exception state information is extracted and captured separately at the intermediate point between multiply and accumulate operations. By taking out the exception state capture from the standard accrued bit update process, the invention preserves exception information that would be lost in conventional simple OR-ing updates, while maintaining separate handling that doesn't overly complicate the overall system.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9507656B2Mechanism for handling unfused multiply-accumulate accrued exception bits in a processor
Publication Date: 2016.11.29 ORACLE AMERICAN INC
  • US9507656B2 patent drawing
  • US9507656B2 patent drawing
  • US9507656B2 patent drawing

AI summary

A mechanism for handling unfused multiply-add accrued exception bits includes a processor including a floating point unit, a storage, and exception logic. The floating-point unit may be configured to execute an unfused multiply-accumulate instruction defined with the instruction set architecture (ISA). The unfused multiply-accumulate instruction may include a multiply sub-operation and an accumulate sub-operation. The storage may be configured to maintain floating-point exception state information. The exception logic may be configured to capture the floating-point exception state after completion of the multiply sub-operation and prior to completion of the accumulate sub-operation, for example, and to update the storage to reflect the floating-point exception state.