Focal Plane Array Through-Vias for ROIC Interconnect

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Solution Overview

Problem

Conventional focal plane array (FPA) devices face challenges in achieving reliable electrical connections and reduced package size due to large bond wires and increased package height, which restricts miniaturization and increases costs.

Innovation Solution

The implementation of conductive through-vias electrically isolated from the photodiode array (PDA) that extend through its thickness, allowing for direct electrical coupling with the read out integrated circuit (ROIC) circuitry, eliminating the need for bond wires and enabling a smaller package footprint and height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bond wires are used to electrically couple ROIC to carrier traces, then electrical connection is achieved, but package height increases and miniaturization is restricted

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent extracts and eliminates the bond wires from the conventional FPA package structure. By removing this intermediate connection element, the ROIC can be directly mounted to the carrier, reducing package height while maintaining electrical connectivity through alternative means (direct bonding or conductive adhesives between ROIC pads and carrier traces).

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the ROIC mounting function and electrical connection function into a single direct interface. Instead of using separate bond wires for electrical connection, the ROIC is directly bonded to the carrier, combining mechanical support and electrical connection into one integrated structure, thereby reducing overall package height.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If conventional package configurations are used, then electrical connection is achieved, but device dimensions and cost increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpackage footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a three-dimensional bond wire routing approach to a planar direct-mount configuration. By eliminating the vertical bond wire loops and using direct horizontal bonding between ROIC and carrier, the design optimizes space utilization in the footprint dimension while reducing height, effectively changing the dimensional priorities of the package structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If larger bond wires are used for electrical coupling, then connection reliability improves, but package size increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidpackage volume
Core Design Contradiction:
ReliabilityVSVolume of stationary object

Solution Approach 1:

The patent replaces the mechanical bond wire system with a direct bonding system. Instead of using flexible metal wires that require loop space and volume, the ROIC is directly bonded to the carrier using rigid or semi-rigid bonding techniques, eliminating the need for voluminous wire loops and reducing overall package volume while maintaining or improving connection reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9000344B2Focal plane array periphery through-vias for read out integrated circuit
Publication Date: 2015.04.07 SENSORS UNLIMITED INC
  • US9000344B2 patent drawing
  • US9000344B2 patent drawing
  • US9000344B2 patent drawing

AI summary

A focal plane array (FPA) including a photodiode array (PDA) and a read out integrated circuit (ROIC). The PDA can include a plurality of conductive through-vias extending through the PDA and electrically isolated from the PDA. The plurality of conductive through-vias can be electrically coupled to circuitry on the ROIC circuit side. The plurality of conductive through-vias can include I/O interconnects such as BGA or other flip-chip bump interconnects that replace conventional wire bond connections, thereby reducing area requirements for bond pads on the ROIC and providing full area coverage of the ROIC circuitry by the PDA bulk material. Embodiments may therefore eliminate wire bonds using bonding to a plurality of metal traces for routing of these interconnects. In an embodiment, an optically transparent lid can include a plurality traces electrically coupled to the plurality of conductive through-vias.