Flexible Printed Circuit Trace Layout for Low Crosstalk

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Solution Overview

Problem

Crosstalk noise occurs between aggressor and victim traces in flexible printed circuits of hard disk drives, particularly in scenarios with common read-write heads, leading to compromised data flow and reliability of read transducers due to over-bias voltage stress, and existing solutions like reordering traces or adding conductor layers are either space-constrained or cost-prohibitive.

Innovation Solution

The flexible printed circuit trace layout positions aggressor traces at one edge of the wiring layer, distanced from victim sensor traces, using layer positioning and multilayer routing to isolate them effectively, thereby reducing crosstalk without occupying additional space or adding layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If reordering traces or adding conductor layers is used to reduce crosstalk, then crosstalk noise is reduced, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvecrosstalk noiseVSAvoidtrace reordering complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies local quality by positioning aggressor traces specifically at the proximal end of wiring layers where they are least likely to interfere with sensor traces, rather than uniformly distributing all traces. This localized optimization of trace positioning reduces crosstalk in critical areas without requiring complete reordering of all traces, thereby reducing complexity while maintaining effectiveness.

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If reordering traces or adding conductor layers is used to reduce crosstalk, then crosstalk noise is reduced, but manufacturing cost increases

Engineering Contradiction:
Improvecrosstalk noiseVSAvoidmanufacturing cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent changes the positional parameter of aggressor traces to the proximal end of wiring layers, which optimizes their location to minimize interference with sensor traces. This parameter optimization reduces crosstalk without requiring additional conductor layers or complex reordering, thereby avoiding increased manufacturing costs while achieving the desired noise reduction.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If adequate distance is maintained between aggressor and sensor traces, then crosstalk noise is reduced, but FPC space increases

Engineering Contradiction:
Improvecrosstalk noiseVSAvoidFPC space
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent utilizes the proximal-distal dimension of the FPC wiring layers to position aggressor traces at the proximal end, away from sensor traces that are typically located more distally. This dimensional approach to trace positioning achieves adequate separation for reducing crosstalk without requiring increased lateral spacing, thereby maintaining compact FPC space while effectively minimizing interference.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12628264B2Flexible printed circuit finger layout for low crosstalk
Publication Date: 2026.05.12 WESTERN DIGITAL TECHNOLOGIES INC
  • US12628264B2 patent drawing
  • US12628264B2 patent drawing
  • US12628264B2 patent drawing

AI summary

A flexible printed circuit (FPC) for a hard disk drive includes a plurality of electrical traces, whereby aggressor traces are isolated from victim traces to avoid crosstalk that could degrade signals. Aggressor traces may be positioned together at one of the edges of each of the top wiring layer and the bottom wiring layer, physically isolated from victim traces. Aggressor traces may be grouped together at either the top wiring layer or the bottom wiring layer, with the victim traces positioned on the layer opposing the aggressor traces. With aggressor and victim traces routed on the same wiring layer, aggressor traces may be routed away from the victim traces with multi-layer routing, by way of vias.