FPGA Analog Output Using Combined Scaled Transceiver Signals

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Solution Overview

Problem

Existing methods for generating analog output from field programmable gate arrays, such as internal digital-to-analog converters or external high-performance converters, often fall short in performance, cost, size, and mass efficiency, particularly in high-speed applications.

Innovation Solution

A system utilizing multiple digital transceivers with programmable output voltage swings, combined using a power combiner to form a digital-to-analog converter, allowing for efficient generation of analog signals without the need for external converters, thereby reducing system cost, size, and mass.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an internal digital to analog converter is used, then the system cost is reduced, but the performance and number of outputs are insufficient

Engineering Contradiction:
Improvesystem costVSAvoidperformance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent combines multiple digital transceiver outputs within the FPGA to form a composite digital-to-analog converter. By merging the output signals from multiple transceivers through a power combiner, the system achieves higher performance and increased output capacity while avoiding the cost of external converters.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent repurposes existing digital transceiver components for an additional analog output function. The same transceiver infrastructure that handles digital communication is also utilized to generate analog signals, eliminating the need for separate dedicated converter hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If external digital to analog converters are used, then the performance is improved, but the cost, size, power consumption, and mass increase considerably

Engineering Contradiction:
ImproveperformanceVSAvoidsystem size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the digital-to-analog conversion function within the existing FPGA structure by combining multiple transceiver outputs. This eliminates the need for external converter components, thereby reducing system size, complexity, and the number of external connections required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The FPGA uses its own internal transceiver resources to perform the digital-to-analog conversion function that would traditionally require external hardware. The system serves its own analog output needs using its existing infrastructure, eliminating dependence on external converters.

Inventive Principle:
Principle #25Self-service

3Reliability

If external high-performance digital to analog converters are used, then the performance is improved, but the power consumption increases

Engineering Contradiction:
ImproveperformanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system uses its existing transceiver power infrastructure to generate analog outputs. Since the transceivers are already powered for their primary digital communication function, the additional analog output generation incurs minimal incremental power cost compared to dedicated external converters.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The transceiver components perform dual functions: digital communication and analog signal generation. This multi-functionality eliminates the need for separate powered converter hardware, thereby reducing overall system power consumption while maintaining high performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10284202B1Generating analog output from a field programmable gate array by combining scaled digital outputs
Publication Date: 2019.05.07 RAYTHEON CO
  • US10284202B1 patent drawing
  • US10284202B1 patent drawing
  • US10284202B1 patent drawing

AI summary

A system for generating analog output from a field programmable gate array. The field programmable gate array has a plurality of digital transceivers, each including a transmitter with an output drive circuit having a programmable output voltage swing. Two or more of the transmitters are programmed to have output voltage swings differing from each other by about a factor of two. A circuit that operates as a digital to analog converter is formed by combining the outputs of the transmitters, using a power combiner.