FPGA Brushless DC Motor Speed Detection
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Solution Overview
Problem
Brushless DC motors with non-linear commutation control due to sensor timing information complicate control logic, requiring complex mathematical calculations and algorithms, which are unsuitable for constrained or harsh environments.
Innovation Solution
A FPGA-based digital motor controller initiates a counter on the falling edge of a tachometer pulse, terminates counting on the rising edge, calculates delta duration, and converts commutation pulses to rotational speed for linear feedback control, using hardware circuitry to simplify control logic and enhance reliability in harsh environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sensors are used to provide timing information for commutation control, then position or speed information can be obtained for feedback control, but the control logic becomes non-linear and complex requiring demanding mathematical calculations and complex algorithms
Solution Approach 1:
The patent replaces complex software-based mathematical calculations and algorithms with dedicated hardware circuitry. The counter and timing circuits are implemented in hardware (FPGA or ASIC) to directly compute commutation control signals from sensor inputs, eliminating the need for complex software processing while maintaining measurement precision.
2Reliability
If a microprocessor and computer system control elements are used for control logic, then accurate control can be achieved, but the system becomes unsuitable for geometrically constrained and harsh environmental conditions
Solution Approach 1:
The patent replaces microprocessor-based control systems with dedicated hardware circuitry implemented in FPGA or ASIC. This hardware implementation eliminates the need for operating systems, memory, and software components, resulting in a compact, radiation-hardened system suitable for harsh environments while maintaining control accuracy through dedicated timing and counting circuits.
3Reliability
If complex mathematical calculations and algorithms are used for commutation control, then accurate control can be achieved, but the system requires demanding computational resources and increased device complexity
Solution Approach 1:
The patent replaces software-based mathematical calculations with hardware-based timing circuits and counters. The commutation control is achieved through direct hardware timing relationships between sensor inputs and commutation signals, eliminating the need for complex algorithms while maintaining control accuracy through precise hardware timing.
Data Source
AI summary
A counter is started on the falling edge of a tach pulse. This counter counts to the rising edge of a second tach pulse, such as the next tach pulse. During the duration of the tach pulse the FPGA calculates the RPM of a motor. In this way, during each commutation period, a RPM is calculated. The present system performs a RPM calculation during each commutation period and/or tach pulse duration.


