FPGA-Based Bending Control for Endoscope Reliability
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Solution Overview
Problem
Conventional electric bending endoscopes face operational disruptions when part of the bending control function fails, causing the entire system to stop and complicating examinations.
Innovation Solution
The electric bending endoscope incorporates a Field Programmable Gate Array (FPGA) to configure logical blocks, allowing for independent control of bending operations and detecting abnormalities, enabling continued bending even if part of the control system fails by switching between different control modes and using alternative sensors like potentiometers when encoders fail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electric bending endoscopes use a single integrated bending control system, then the control structure is simple, but the system stops completely when part of the control function fails
Solution Approach 1:
The bending control system is divided into multiple independent logical blocks (first bending control logical block and second bending control logical block). Each block can control bending operations independently, so when one block fails, the other can continue to operate, ensuring system continuity without requiring a complete system redesign.
2Reliability
If the system uses multiple sensors (encoder and potentiometer) for bending detection, then the reliability improves, but the device complexity increases
Solution Approach 1:
The potentiometer serves dual purposes: it acts as a backup sensor when the encoder fails, and it can independently detect bending state when the encoder is malfunctioning. This multi-functionality approach ensures continuous operation without adding complex redundancy systems, as the same component provides both primary and backup functions.
3Productivity
If the bending control system operates without failover capability, then the system is simpler to control, but operational disruptions occur during examinations
Solution Approach 1:
The system continuously monitors the operational status of the bending control logical blocks and automatically switches between them when failures are detected. This feedback mechanism ensures seamless operation during examinations by transparently handling failures without requiring operator intervention or awareness of the underlying complexity.
Data Source
AI summary
In the present invention, a logical block of an FPGA is configured by a serial communication unit, a serial communication control portion, an EEPROM controller, an abnormal signal processing portion, an LED controller, an operation mode controller, a DPRAM, a clutch signal input portion, a jig substrate input output portion, a RAM, a motor controller, a motor drive waveform generating portion, an RL (right and left) motor current F/B portion, a UD (up and down) motor current F/B portion, a potentiometer control portion, a thermistor control portion, an RL encoder control portion, a UD encoder control portion, and an FPGA block abnormality monitoring portion.