FPGA Bitstream Detection Using Spatial Graph Classification
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Solution Overview
Problem
Existing bitstream detection methods for FPGAs are inadequate in identifying dispersed and obfuscated malicious patterns, particularly ring oscillator (RO)-based circuits, which can cause voltage-based attacks and denial-of-service (DoS) in multi-tenant environments, as they do not consider spatial relationships and can be evaded by attackers.
Innovation Solution
A system utilizing a graph convolutional network (GCN) and convolutional neural network (CNN) to analyze the spatial context of FPGA bitstreams, converting them into images, generating graphs, and performing machine learning inference to classify bitstreams as benign or malicious, effectively detecting stealthy and power-wasting Trojan circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If reverse-engineering methods are used to detect malicious bitstreams, then detection capability is improved, but detection time increases significantly and tool modification is required
Solution Approach 1:
The patent replaces traditional reverse-engineering mechanical analysis methods with machine learning-based automated detection. The system uses trained models to directly analyze bitstream features and detect malicious patterns without requiring time-intensive reverse engineering steps or manual tool modifications.
Solution Approach 2:
The patent transforms the detection approach by changing from analyzing raw bitstream data through reverse engineering to extracting specific features and feeding them into pre-trained machine learning models. This parameter transformation enables faster detection while maintaining accuracy.
2Ease of operation
If machine learning methods rely on contiguous windows for detection, then detection simplicity is maintained, but detection accuracy decreases against obfuscated attacks
Solution Approach 1:
The patent enhances the detection approach by adding spatial dimension analysis to the traditional contiguous window method. The system analyzes not only sequential patterns within windows but also spatial relationships between different windows and their positions in the bitstream, creating a multi-dimensional detection space that captures obfuscated patterns.
Solution Approach 2:
The patent divides the bitstream into multiple non-overlapping windows and analyzes each window's features separately before integrating results. This segmentation allows the system to capture localized malicious patterns while maintaining overall context through feature aggregation, improving detection of dispersed obfuscated circuits.
3Object-affected harmful factors
If attackers split inverters across multiple LUTs to obfuscate RO patterns, then evasion capability is improved, but spatial context information is lost
Solution Approach 1:
The patent incorporates spatial context feedback into the detection process by analyzing the positions and relationships between different bitstream windows. The system uses this spatial feedback to identify patterns that may be dispersed across multiple LUTs, counteracting the obfuscation effect by leveraging positional information rather than losing it.
Data Source
AI summary
A method of detecting stealthy bitstreams in field programmable gate arrays (FPGAs) includes receiving an FPGA bitstream for configuring an FPGA; converting the FPGA bitstream into images; generating a graph from the images using a similarity evaluation; and performing a classification of the FPGA bitstream as benign or malicious using the graph as input to a graph convolutional network.