FPGA AFU Thermal Management via BMC Dynamic Disabling

The patent introduces a Baseboard Management Controller (BMC) as an intermediary device to manage FPGA power consumption. The BMC monitors power usage and dynamically reconfigures the FPGA without interrupting processing tasks, thereby resolving the contradiction between reducing power consumption and maintaining task continuity. The BMC acts as a mediator between the FPGA and the system, enabling seamless power management.

The patent implements self-service mechanisms where the FPGA monitors its own power consumption and automatically reconfigures its Accelerated Function Units (AFUs) based on predefined power thresholds. This self-monitoring and self-reconfiguration capability reduces the need for complex external control systems, thereby improving power management efficiency while minimizing the increase in system complexity.

The patent employs dynamic thermal management where the FPGA continuously monitors its temperature and dynamically adjusts the configuration of AFUs in real-time. When temperature exceeds thresholds, specific AFUs are disabled or reconfigured to reduce heat generation. When temperature returns to acceptable levels, AFUs are reactivated. This dynamic approach maintains productivity by only disabling AFUs when necessary, rather than permanently reducing processing capacity.

The patent implements preliminary action by pre-configuring multiple personality bitstreams in the BMC's memory before they are needed. The BMC loads and stores these bitstream configurations in advance, allowing for rapid switching between different FPGA configurations without requiring extensive real-time processing. This preliminary preparation optimizes processing efficiency while minimizing the BMC's real-time energy consumption during actual load balancing operations.