FPGA Boot Program Storage Integration
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Solution Overview
Problem
The use of separate storage media for CPUs and FPGAs in information processing apparatuses increases costs and circuit complexity, as the ROM for the CPU is typically small and only used at startup, making it undesirable to provide a separate ROM for the CPU.
Innovation Solution
An information processing apparatus that integrates an FPGA to function as both a boot program storage medium and a circuit for processing image data, eliminating the need for a separate ROM by reconfiguring the FPGA to perform these functions dynamically, using a flash ROM to store circuit configurations and allowing the FPGA to serve as a master device connected via a serial peripheral interface bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate ROM is provided for storing the CPU boot program, then the CPU can reliably execute startup operations, but the device complexity and component costs increase
Solution Approach 1:
The patent merges the CPU boot program storage function with the FPGA configuration storage function by storing both the CPU boot program and FPGA configuration data in the same flash ROM. This eliminates the need for a separate ROM for the CPU, reducing device complexity while maintaining reliable startup operations through proper boot sequence control.
Solution Approach 2:
The flash ROM is designed to serve multiple functions: storing the CPU boot program, storing FPGA configuration data, and supporting both CPU startup and FPGA initialization. This multi-functional approach reduces the number of dedicated components needed while ensuring both CPU and FPGA receive their required data during startup.
2Ease of manufacture
If distinct storage media are provided for CPU and FPGA, then each component can be optimized for its specific function, but the manufacturing cost increases
Solution Approach 1:
The patent combines multiple storage functions into a single flash ROM component, eliminating the need for separate ROM modules for CPU and FPGA. This reduces the quantity of storage components while maintaining the ability to optimize each component's function through software-controlled data allocation and retrieval sequences.
3Reliability
If a separate ROM is provided for the CPU, then the boot program can be stored securely, but the circuit scale increases
Solution Approach 1:
The patent merges the CPU boot program storage with FPGA configuration storage in a single flash ROM, thereby reducing the total circuit board area occupied by storage components. The boot program remains securely stored and accessible to the CPU through controlled read operations during the startup sequence.
Data Source
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AI summary
An information processing apparatus includes a control unit, a processing unit capable of dynamically changing a circuit configuration thereof, and a storage unit configured to store circuit information indicating a circuit configuration to be read into the processing unit, wherein the processing unit reads first circuit information from the storage unit to function as a storage medium for storing a program, and wherein the control unit reads the program from the processing unit to execute the program.