Chassis Management via FPGA Point-to-Point Communication

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Solution Overview

Problem

The existing control plane communication in modular packet network devices is unreliable due to a single management bus failure, high CPU usage for polling, slow reaction to card failures, and susceptibility to packet loss leading to unnecessary line card reboots.

Innovation Solution

Employing dedicated hardware resources like FPGAs on each card with serial bus connections between line card and RPM FPGAs, allowing for automatic polling and rapid heartbeat messages, reducing CPU load and improving failure detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single management bus is used for control plane communication, then device complexity is reduced, but reliability deteriorates due to single point of failure

Engineering Contradiction:

Improvecontrol plane communication structureVSAvoidcontrol plane communication reliability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent divides the control plane communication into separate data paths: a management data plane using Ethernet switches and a monitoring plane using I2C bus, allowing independent operation and failure isolation of each path

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements redundant management paths and monitoring mechanisms that are prepared in advance to cushion against single bus failures, ensuring continuous operation even when one path fails

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Measurement precision

If polling is used to monitor line card status, then measurement capability is achieved, but CPU usage increases

Engineering Contradiction:

Improveline card status monitoringVSAvoidCPU cycle consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent introduces Ethernet switches as intermediaries in the management data plane that can monitor and forward control plane traffic, offloading monitoring functions from the CPU and enabling efficient status detection

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces CPU-based software polling with hardware-based monitoring mechanisms using Ethernet switches and dedicated monitoring circuits that automatically detect line card status without consuming CPU cycles

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If a single management bus is used, then device complexity is reduced, but reaction speed to card failures deteriorates

Engineering Contradiction:

Improvecommunication architectureVSAvoidfailure detection speed

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The patent segments the communication architecture into dedicated monitoring paths that can independently and rapidly detect failures without being bottlenecked by a single shared bus

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements continuous monitoring and heartbeat mechanisms that detect failures immediately when they occur, rather than waiting for periodic polling cycles to reveal the problem

Inventive Principle:

Principle #10Preliminary action

4Adaptability or versatility

If Ethernet switches are used in the control plane, then communication flexibility is improved, but susceptibility to packet loss increases

Engineering Contradiction:

Improvecontrol plane communication capabilityVSAvoidpacket delivery reliability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements redundant communication paths and error correction mechanisms that cushion against packet loss, ensuring reliable control plane communication even when Ethernet switches experience transmission errors

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9705824B2Intelligent chassis management

Publication Date: 2017.07.11 DELL MARKETING CORP

AI summary

A modular system uses point-to-point communication between field-programmable gate arrays (FPGAs) on a control module and each port module, respectively, to manage basic module functions, such as power, environmental monitoring, and health checks on the modules and their components. This allows a chassis to be managed without fully powering each card first, frees processors on the modules from having to perform health checks, allows dedicated resources to rapidly monitor the health of each card, and prevents one bad card from disabling management of all cards.