FPGA Circuit Simulation Adaptability via Parameterized Calculation

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Solution Overview

Problem

In existing HILS methods using FPGAs or real-time OS processors, changing the constant values of circuit elements requires reprogramming the FPGA or processor, leading to delays in verification processes.

Innovation Solution

An information processing apparatus with a conversion unit that converts circuit configuration data into circuit calculation data, including an equation group that generates output signals based on input signals and constant values, allowing for efficient simulation without the need for repeated reprogramming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the FPGA is reprogrammed to simulate the operation of the electric circuit with different constant values, then the simulation can be executed for different circuit element characteristics, but the verification work is delayed due to the need to generate and incorporate data into the FPGA every time the constant is changed

Engineering Contradiction:
Improvesimulation adaptabilityVSAvoidverification time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent changes the approach from hardware reconfiguration to parameter variation. Instead of reprogramming the FPGA when circuit element constants change, the invention incorporates the calculation unit that can accept different constant values as input parameters. This allows the same hardware configuration to simulate different circuit behaviors by simply changing the parameter values fed to the calculation unit, thereby maintaining simulation adaptability while eliminating reprogramming time.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a computational model (copy) of the circuit behavior that can be executed on the FPGA. Rather than physically reconfiguring the FPGA hardware for each circuit variant, a mathematical model of the circuit is created that can be repeatedly executed with different parameter values. This computational copy allows rapid iteration through different simulation scenarios without hardware reconfiguration overhead.

Inventive Principle:
Principle #26Copying

2Reliability

If the FPGA is reprogrammed for each different constant value, then accurate simulation of different circuit configurations is achieved, but the complexity of the verification process increases due to repeated data generation and incorporation steps

Engineering Contradiction:
Improvesimulation accuracyVSAvoidverification process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal simulation platform where a single FPGA configuration can handle multiple circuit simulation scenarios. The calculation unit is designed to be multi-functional, accepting different circuit element constants as input parameters and producing accurate simulations for various circuit configurations. This universal approach maintains simulation accuracy while simplifying the verification process by eliminating the need for separate FPGA programming for each circuit variant.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the circuit element constants from the hardware configuration and treats them as separate input parameters. By separating the constant values from the FPGA programming, the system can maintain a fixed, simplified hardware configuration while varying parameters through software or input data. This extraction reduces verification process complexity while preserving simulation accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3933655B1Information processing device and method
Publication Date: 2025.02.19 ZUKEN
  • EP3933655B1 patent drawingFigure 1
  • EP3933655B1 patent drawingFigure 2
  • EP3933655B1 patent drawingFigure 3

AI summary

An information processing apparatus includes a conversion unit configured to convert circuit configuration data representing a configuration of an electric circuit including an input terminal group and an output terminal group into circuit calculation data including an equation group that generates an output signal group corresponding to an argument group given to a variable group and an input signal group given to the input terminal group, wherein the argument group includes a constant representing a characteristic of a circuit element that forms the electric circuit.