Placement Driven Control Set Resynthesis for FPGA Packing Density
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Solution Overview
Problem
In integrated circuit devices, particularly FPGAs, components placed in the same localized region often have conflicting control sets, leading to overlap issues that conventional methods resolve by re-placing components, which can negatively impact timing, power, and wirelength optimizations.
Innovation Solution
A method for placement driven control set resynthesis, where a congestion density map is generated to identify control set conflicts, and incremental resynthesis is performed by moving functionality of conflicting circuit objects to driver look-up tables, allowing control set conflicts to be resolved without re-placing components, thereby increasing packing density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If components are placed in the same localized region to increase packing density, then packing density is improved, but control set conflicts occur causing overlap issues
Solution Approach 1:
The invention changes the control set parameter of circuit objects by performing incremental resynthesis. When control set conflicts are detected in congested regions, the system modifies the control set parameters through resynthesis operations, allowing multiple components to coexist in the same localized region without conflicts, thereby maintaining high packing density while ensuring reliability.
2Reliability
If components are re-placed to resolve control set conflicts, then control set conflicts are eliminated, but timing, power, and wirelength optimizations are negatively impacted
Solution Approach 1:
The invention extracts the control set conflict resolution from the placement process itself. Instead of re-placing components to resolve conflicts, the system identifies conflicts after placement and resolves them through incremental resynthesis of control sets, separating the placement optimization from the conflict resolution and preserving timing, power, and wirelength optimizations.
Solution Approach 2:
The invention performs preliminary placement to achieve optimal timing, power, and wirelength metrics, then subsequently resolves control set conflicts through incremental resynthesis. This preliminary placement action allows the system to secure optimization benefits before addressing conflicts, avoiding the need to undo placement decisions.
3Reliability
If conventional placement methods are used to resolve control set conflicts, then conflicts are eliminated, but deviation from original global placement solution increases
Solution Approach 1:
The invention applies partial resynthesis action only to the specific circuit objects involved in control set conflicts, rather than re-placing entire regions or components. This partial action resolves conflicts while minimizing deviation from the original global placement solution, maintaining the overall placement structure and reducing complexity.
Data Source
AI summary
Circuit placement for increasing circuit packing density for an integrated circuit is described. A design is synthesized and mapped. Components of the design are placed to provide a first placed design. A congestion density map is generated for the first placed design. A congestion region in the congestion density map is identified and targeted for determining if the first placed design has a control set conflict. A first circuit object associated with the control set conflict is selected and either re-placed or re-synthesized to at least diminish the control set conflict.