FPGA Debug Module Encryption for Secure Remote Access

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Solution Overview

Problem

Cloud service providers renting FPGA hardware to customers for development and workload acceleration raise security concerns, particularly in protecting sensitive design data and intellectual property during remote debugging, as existing solutions lack mechanisms to restrict access to debug interfaces and prevent data leakage.

Innovation Solution

Implementing a debug cryptographic module within the FPGA that encrypts and decrypts debug data using a symmetric key, ensuring only the customer's debug application can access decrypted content, and using access controls to restrict untrusted software from accessing debug content, thereby maintaining confidentiality and integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If FPGA hardware is rented to cloud customers for remote debugging, then accessibility and ease of operation are improved, but security and data leakage risks worsen

Engineering Contradiction:
Improveremote debugging accessibilityVSAvoiddata leakage risk
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent segments the debugging system into multiple components with distinct security responsibilities: a debug module within the FPGA, a debug application on the customer platform, and a cloud service provider platform. This segmentation allows remote debugging functionality to be maintained while distributing security controls across different trust zones, thereby enabling accessibility without compromising security.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary cryptographic module that sits between the debug application and the FPGA debug registers. This intermediary encrypts debug data before it leaves the FPGA and decrypts it only for the authorized debug application, acting as a mediator that enables remote access while preventing data leakage to untrusted cloud software.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If debug interfaces are made accessible remotely, then ease of operation is improved, but reliability of data protection worsens

Engineering Contradiction:
Improveremote debug accessVSAvoiddata protection assurance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent changes the security parameter of debug data from plaintext to encrypted form during transmission and storage. By applying cryptographic transformation to the debug data, the system maintains remote accessibility while ensuring that even if data is intercepted, it remains protected and cannot be read without the proper decryption keys.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If encryption is implemented for debug data, then security is improved, but device complexity increases

Engineering Contradiction:
Improvedata leakage preventionVSAvoidcryptographic module integration
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent implements a cryptographic module that serves multiple functions: encrypting debug data, decrypting incoming debug requests, and managing security keys. By making this security component multi-functional, the patent reduces the need for separate dedicated components for each security operation, thereby mitigating the increase in device complexity while maintaining comprehensive data protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3913513A1Secure debug of FPGA design
Publication Date: 2021.11.24 INTEL CORP
  • EP3913513A1 patent drawingFigure 1~2
  • EP3913513A1 patent drawingFigure 3
  • EP3913513A1 patent drawingFigure 4

AI summary

Technologies to perform a secure debug of a FPGA are described. In some examples an apparatus comprises an accelerator device comprising processing circuity to facilitate acceleration of a processing workload executable on a remote processing device, a computer-readable memory to store logic operations executable on the accelerator device, and a debug module. The debug module comprises one or more debug registers to store debug data for the logic operations executable on the accelerator device and processing circuitry to receive, from a debug application on the remote processing device, a memory access request directed to a target debug register of the one or more debug registers, encrypt the debug data in the target debug register to generate encrypted debug data, and return the encrypted debug data to the debug application. Other embodiments are described and claimed.