Parameterizable FPGA Filter Blocks With Automatic Schematic Adjustment
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Solution Overview
Problem
Existing electronic design automation (EDA) tools for field programmable gate arrays (FPGAs) require manual adjustments of multiple design aspects when parameters like interpolation rate, decimation rate, or clock frequency are changed, which is time-consuming and labor-intensive.
Innovation Solution
An EDA tool with a graphical user interface that includes a parameterizable filter block library, allowing designers to select and modify filter components automatically adjusts the design without changing the block count or connections, using a design adjustment unit to represent changes in text notation on existing blocks and connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If manual adjustments are made to support parameter changes in DSP circuits, then design flexibility and adaptability are improved, but design time and labor effort increase significantly
Solution Approach 1:
The EDA tool automatically performs design adjustments when parameters change, without requiring manual intervention. The system detects parameter changes and autonomously modifies data paths, component configurations, and interconnections, allowing the design process to serve itself rather than requiring continuous designer input.
Solution Approach 2:
The invention enables automatic adaptation to parameter changes by detecting modifications to DSP circuit parameters (such as channel counts, clock frequencies, data widths) and automatically adjusting the design to support new parameter values. This transforms the design process from static to dynamically adaptive based on parameter modifications.
2Adaptability or versatility
If manual widening of data paths and repeating of components is performed, then support for new parameters is achieved, but additional time and effort are required
Solution Approach 1:
The EDA tool automatically performs design adjustments when parameters change, without requiring manual intervention. The system detects parameter changes and autonomously modifies data paths, component configurations, and interconnections, allowing the design process to serve itself rather than requiring continuous designer input.
Solution Approach 2:
The invention replaces manual mechanical design operations (cutting, pasting, wiring) with automated electronic/algorithmic processes. The EDA tool uses algorithms to automatically widen data paths, replicate components, and reconfigure interconnections, substituting the mechanical designer's hands with automated software intelligence.
3Adaptability or versatility
If the number of blocks and connections is increased to support parameter changes, then design capability is improved, but schematic complexity increases
Solution Approach 1:
The invention maintains a hierarchical block structure where parameterizable blocks encapsulate internal complexity. Rather than exploding all internal connections when parameters change, the system segments the design into manageable blocks that can be independently configured, keeping the top-level schematic simple while allowing complex internal adaptations.
Solution Approach 2:
The invention uses parameterizable blocks that can adapt to multiple configurations without requiring separate blocks for each configuration. A single block instance can support different channel counts, data widths, and clock frequencies through parameter adjustment, reducing the total number of blocks needed compared to having dedicated blocks for each parameter combination.
Data Source
AI summary
An electric design automation (EDA) tool for generating a design of a system on a field programmable gate array (FPGA) includes a graphical user interface to create a block based schematic. The EDA tool includes a library that includes a parameterizable filter block selectable by a designer to include in the block based schematic to represent a component in the design that filters data. The EDA tool includes a design adjustment unit to automatically modify previously programmed and selected components and wires in the block based schematic without input from the designer upon determining a change made to the parameterizable filter block by the designer.