FPGA Library Update via OS Intermediary

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Solution Overview

Problem

General purpose computing systems lack efficient management of field programmable gate array (FPGA) resources, leading to suboptimal utilization and updating of FPGA functions across multiple processes.

Innovation Solution

Implementing FPGAs as shared programmable co-processors within a general-purpose computing system, where the operating system manages resource allocation, programming, and scheduling, and provides an update process for hardware libraries through an update server, allowing dynamic updating and selection of libraries based on user requests, application needs, or polling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If FPGAs are used as shared programmable co-processors in general-purpose computing systems, then resource utilization and hardware acceleration are improved, but device complexity and management overhead increase

Engineering Contradiction:
Improveresource utilizationVSAvoidmanagement overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an operating system as an intermediary layer between applications and FPGA hardware resources. The OS manages library updates, handles allocation decisions, and coordinates programming operations, thereby reducing the complexity burden on individual applications while enabling efficient shared resource utilization across multiple processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The FPGA is designed as a universal shared resource that can be dynamically reconfigured to serve multiple different functions and processes. Through the hardware library mechanism, the same physical FPGA device can be programmed with different functionality as needed by different applications, maximizing resource utilization while consolidating management overhead at the OS level.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If hardware libraries are updated frequently to add new functions, then adaptability and functionality are improved, but update time and system downtime increase

Engineering Contradiction:
ImprovefunctionalityVSAvoidupdate time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The operating system performs preliminary actions by proactively monitoring for library updates and initiating download and installation processes before applications actually need the new functionality. This advance preparation ensures that when applications require updated functions, the libraries are already ready, minimizing disruption and update time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The hardware library update mechanism is designed to be dynamic and flexible, allowing updates to occur at different times based on system conditions, application needs, and user preferences. The system can switch between automatic updates, on-demand updates, and manual update modes, optimizing the balance between adaptability and time loss for different scenarios.

Inventive Principle:
Principle #15Dynamics

3Productivity

If multiple processes share the FPGA resource, then resource efficiency is improved, but access conflicts and scheduling complexity increase

Engineering Contradiction:
Improveresource efficiencyVSAvoidscheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The operating system implements feedback mechanisms to monitor FPGA usage, library availability, and application requirements in real-time. Based on this feedback, the OS dynamically adjusts library allocation and programming decisions, optimizing resource efficiency while managing access conflicts through informed scheduling rather than static rules.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9424019B2Updating hardware libraries for use by applications on a computer system with an FPGA coprocessor
Publication Date: 2016.08.23 MICROSOFT TECHNOLOGY LICENSING LLC
  • US9424019B2 patent drawing
  • US9424019B2 patent drawing
  • US9424019B2 patent drawing

AI summary

A computer system includes one or more field programmable gate arrays as a coprocessor that can be shared among processes and programmed using hardware libraries. Given a set of hardware libraries, an update process periodically updates the libraries and/or adds new libraries. One or more update servers can provide information about libraries available for download, either in response to a request or by notifying systems using such libraries. New available libraries can be presented to a user for selection and download. Requests for updated libraries can arise in several ways, such as through polling for updates, exceptions from applications attempting to use libraries, and upon compilation of application code.