Commodity FPGA Logic Drive for Low-NRE Custom IC Scaling

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Solution Overview

Problem

The high Non-Recurring Engineering (NRE) costs and inefficiencies of transitioning from Field Programmable Gate Arrays (FPGA) to Application Specific IC (ASIC) or Customer-Owned Tooling (COT) chips, particularly in advanced semiconductor technology nodes, hinder innovation and scalability.

Innovation Solution

Utilizing a standardized commodity logic drive comprising plural FPGA IC chips and non-volatile memory IC chips, reducing NRE costs by enabling field programming for various applications, and allowing companies to transition to a commodity logic IC chip business or software development.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If FPGA IC chips are used for a given application, then adaptability and ease of operation are improved, but semiconductor chip size increases, fabrication yield decreases, and fabrication cost increases

Engineering Contradiction:

ImproveadaptabilityVSAvoidfabrication yield

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The system is divided into two separate components: a standardized commodity FPGA IC chip (providing adaptability) and an Application Specific IC chip (providing optimized performance). This segmentation allows each component to be independently optimized - the FPGA for versatility and the ASIC for manufacturing efficiency and yield.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The standardized commodity FPGA IC chip serves as a universal platform that can be programmed to perform multiple different applications. This multi-functionality provides adaptability across various uses while maintaining consistent manufacturing processes and high fabrication yield through standardization.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If FPGA IC chips are used for a given application, then adaptability is improved, but power consumption increases

Engineering Contradiction:

ImproveadaptabilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The system separates the universal programming capability (FPGA) from the application-specific execution (ASIC). The FPGA consumes power only during programming and configuration, while the ASIC provides energy-efficient execution for the specific application, thus reducing overall power consumption while maintaining adaptability.

Inventive Principle:

Principle #1Segmentation

3Adaptability or versatility

If FPGA IC chips are used for a given application, then adaptability is improved, but performance decreases

Engineering Contradiction:

ImproveadaptabilityVSAvoidperformance

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The system divides functionality between a standardized FPGA IC chip (providing adaptability through field programming) and an Application Specific IC chip (providing high performance for specific applications). This segmentation allows the FPGA to be programmed with the desired logic while the ASIC delivers optimized performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The standardized commodity FPGA IC chip provides universal programming capability that can be configured for different applications, while the Application Specific IC chip delivers high-performance execution. This combination achieves both adaptability and high performance.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Productivity

If ASIC or COT IC chips are used in advanced technology nodes, then performance and power efficiency are improved, but Non-Recurring Engineering costs increase greatly

Engineering Contradiction:

ImproveperformanceVSAvoidNRE cost

Core Design Contradiction:

ProductivityVSEase of manufacture

Solution Approach 1:

The system uses a standardized commodity FPGA IC chip that can be programmed to implement different applications, eliminating the need for expensive NRE costs associated with designing custom ASICs. The same standardized chip can serve multiple applications through field programming.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes the approach from fixed hardware design (ASIC) to reconfigurable hardware (FPGA). This parameter change allows the same physical chip to be reprogrammed for different applications, avoiding the high NRE costs of creating new ASIC designs while maintaining the ability to achieve high performance through optimized programming.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20260044658A1Logic drive based on standard commodity FPGA IC chips

Publication Date: 2026.02.12 ICOMETRUE CO LTD

AI summary

A chip package used as a logic drive, includes: multiple semiconductor chips, a polymer layer horizontally between the semiconductor chips; multiple metal layers over the semiconductor chips and polymer layer, wherein the metal layers are connected to the semiconductor chips and extend across edges of the semiconductor chips, wherein one of the metal layers has a thickness between 0.5 and 5 micrometers and a trace width between 0.5 and 5 micrometers; multiple dielectric layers each between neighboring two of the metal layers and over the semiconductor chips and polymer layer, wherein the dielectric layers extend across the edges of the semiconductor chips, wherein one of the dielectric layers has a thickness between 0.5 and 5 micrometers; and multiple metal bumps on a top one of the metal layers, wherein one of the semiconductor chips is a FPGA IC chip, and another one of the semiconductor chips is a NVMIC chip.