Non-Volatile FPGA LUT Architecture With Programmable Impedance
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Solution Overview
Problem
Conventional Field Programmable Gate Arrays (FPGAs) face challenges due to large area requirements, volatility of configuration bits, lack of fault tolerance, and complexity in nanometer-scale fabrication, necessitating a reconfigurable and fault-tolerant logic device that can be manufactured at both nanometer and micron scales.
Innovation Solution
A reconfigurable logic device utilizing programmable impedance devices with a look-up table and storage elements, featuring electrodes with a programmable material between them, allowing for non-volatile and fault-tolerant operation by adjusting impedance through voltage pulses, enabling redundancy and scalability to nanometer dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional FPGAs use volatile configuration bits, then the device can be reconfigured, but the configuration information requires additional external memory and set-up time
Solution Approach 1:
The patent combines the configuration memory and logic functionality into a single unified structure where configuration bits are directly integrated within the logic elements themselves, eliminating the need for separate external memory devices and reducing overall system complexity
Solution Approach 2:
The logic elements are designed to serve dual purposes: they function as both the configuration storage and the active logic components, allowing the same hardware structure to perform multiple functions without requiring separate dedicated memory units
2Reliability
If conventional FPGAs use programmable fuse based configuration bits, then the configuration is non-volatile, but the device can only be programmed once and is not reconfigurable
Solution Approach 1:
The patent employs configuration bits with switchable impedance states that can be dynamically reprogrammed multiple times, transitioning from static fuse-based programming to dynamic reconfigurable elements that maintain non-volatility while enabling repeated reconfiguration
Solution Approach 2:
The invention changes the physical state parameter of configuration bits from irreversible fuse breakdown to reversible impedance switching, allowing the same bit to be reprogrammed by changing its resistance state without permanent damage, thus enabling both non-volatility and reconfigurability
3Reliability
If conventional FPGAs use non-volatile memory such as Flash memory for configuration bits, then the configuration is retained without power, but the cell size is larger and fault tolerance is not improved
Solution Approach 1:
The patent transitions from using large-cell Flash memory to compact resistance-based configuration bits that leverage electrical resistance states for non-volatile storage, dramatically reducing the physical area required per configuration bit while maintaining power-independent retention
Solution Approach 2:
The invention replaces the mechanical/electrical charge storage mechanism of Flash memory with a resistance-based state mechanism, using materials that maintain their resistance state without power, thereby achieving non-volatility in a much smaller footprint
4Ease of manufacture
If conventional CMOS FPGAs are used, then the device can be manufactured with standard processes, but subatomic particles can alter configuration bits and cause functional failures
Solution Approach 1:
The patent changes the physical state used for configuration from voltage-based (prone to single-event upsets) to resistance-based states, where the high resistance contrast and non-volatile nature provide inherent immunity to subatomic particle-induced transient errors while maintaining CMOS compatibility
Solution Approach 2:
The invention uses readily available nanoscale materials and structures that can be integrated into standard CMOS processes, replacing complex fault-tolerance mechanisms with simpler resistance-state elements that naturally resist particle effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a compact, fault-tolerant, and reconfigurable logic device that can withstand subatomic particle upsets, reducing the need for external memory and enhancing manufacturing flexibility at nanometer scales while maintaining stable impedance states.
Implementation Method 1
Each programmable impedance device in the array includes a first electrode operably coupled to one of the plurality of LUT input signal, a second electrode disposed to form a junction wherein the second electrode at least partially overlaps the first electrode, and a programmable material disposed between the first electrode and the second electrode at least at the junction. The programmable material operably couples the first electrode and the second electrode such that each programmable impedance device exhibits a non-volatile programmable impedance.
Implementation Method 2
These reported devices have the characteristics of non-volatile configurable switches, wherein a bias may be applied to the molecular electronic device in such a manner as to cause the device to appear substantially like an open switch (i.e. a very high resistance) or substantially like a closed switch (i.e. a very low resistance).
Data Source
AI summary
Reconfigurable logic devices and methods of programming the devices are disclosed. The logic device includes a look-up table (LUT) and at least one storage element configured for sampling LUT output signals. The LUT comprises a plurality of input signals, an array of programmable impedance devices operably coupled to the input signals, and the LUT output signals. Each programmable impedance device in the array includes a first electrode operably coupled to one of the input signal, a second electrode disposed to form a junction wherein the second electrode at least partially overlaps the first electrode, and a programmable material disposed between the first electrode and the second electrode. The programmable material operably couples the first electrode and the second electrode such that each programmable impedance device exhibits a non-volatile programmable impedance. The array may be configured as a one-dimensional or two-dimensional array.