FPGA Configuration Memory Error Detection During Reconfiguration
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Solution Overview
Problem
Existing electronic control devices for autonomous driving, particularly those using field-programmable gate arrays (FPGAs), lack sufficient reliability due to inadequate error detection mechanisms during dynamic reconfiguration.
Innovation Solution
An electronic control device with a rewritable configuration memory composed of multiple frames, a reconfiguration control unit, and a configuration memory diagnosis unit that performs error detection on frames rewritten during reconfiguration, ensuring error detection occurs before non-reconfigured frames.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection is performed on all frames sequentially after reconfiguration, then comprehensive error detection coverage is achieved, but detection time increases and system reliability during reconfiguration is reduced
Solution Approach 1:
The configuration memory is divided into multiple frames, and error detection is segmented to prioritize recently rewritten frames. The diagnosis unit selectively detects errors in specific frames based on rewrite timing information, rather than uniformly detecting all frames, thus reducing total detection time while maintaining reliability for critical reconfigured areas.
Solution Approach 2:
The system performs preliminary error detection on recently rewritten frames immediately after reconfiguration operations. By identifying which frames were most recently rewritten and prioritizing their detection, the system proactively checks critical areas before they can cause system failures, improving reliability without requiring full sequential detection of all frames.
2Reliability
If error detection is performed on all frames, then complete error coverage is achieved, but the complexity of the detection system increases
Solution Approach 1:
The detection mechanism is segmented into a frame management unit that tracks rewrite operations and a diagnosis unit that performs selective detection. This segmentation allows the system to maintain simple per-frame detection logic while achieving intelligent prioritization through the management unit, reducing overall system complexity compared to a unified detection approach.
Solution Approach 2:
Each frame contains embedded error detection codes (EDC) that enable self-diagnosis. When the diagnosis unit reads frame data, the EDC automatically indicates whether errors are present in that frame, eliminating the need for complex external analysis logic and simplifying the detection mechanism while maintaining reliable error coverage.
3Use of energy by moving object
If dynamic reconfiguration is implemented to reduce device size and power consumption, then cost and power efficiency improve, but reliability and error detection capability deteriorate
Solution Approach 1:
The system performs preliminary error detection on recently rewritten configuration frames immediately after reconfiguration operations complete. This proactive detection ensures that errors introduced during dynamic reconfiguration are identified before they can affect system operation, maintaining functional safety while enabling power-efficient dynamic reconfiguration.
Solution Approach 2:
The frame management unit maintains rewrite timing information and provides feedback to the diagnosis unit about which frames require priority detection. This feedback mechanism ensures that error detection resources are dynamically allocated to frames that were recently modified, maintaining high reliability during reconfiguration operations while keeping the system power-efficient.
Data Source
AI summary
An electronic control device includes a rewritable configuration memory composed of a plurality of frames in which logic circuit information is stored, a reconfiguration control unit configured to rewrite the logic circuit information of the frames, a logic unit configured to form a logic circuit based on the logic circuit information stored in the frames, and a configuration memory diagnosis unit configured to read the logical circuit information stored in the frames of the configuration memory and to perform error detection which is detection of an error in the stored logic circuit information, in which when the frames are rewritten by the reconfiguration control unit, the configuration memory diagnosis unit performs the error detection of ones of the frames that are rewritten prior to ones of the frames that are not rewritten.