FPGA Memory Paging for Market Data Latency

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Solution Overview

Problem

Existing market data platforms face increasing processing requirements due to large volumes of financial information, leading to high latency and increased costs as they rely on adding processors or computers, making it impractical to scale performance further.

Innovation Solution

Implementing a hardware offload solution using a Field Programmable Gate Array (FPGA) to perform tasks such as line arbitrage, decoding, symbol splitting, and memory paging, which bypasses software processing, reducing latency and processing load, and enabling efficient data handling and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If processors or computers are added to increase processing power, then processing capability is improved, but cost and system complexity increase to impractical levels

Engineering Contradiction:

Improveprocessing capabilityVSAvoidsystem complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent segments processing tasks between FPGA hardware components and software components. The FPGA handles specific high-speed processing tasks (parsing, validation, routing) while software handles higher-level application logic, allowing parallel processing without proportionally increasing overall system complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The FPGA acts as an intermediary component between network interfaces and software applications. It receives data from network interfaces, performs preliminary processing and validation, then passes processed data to software applications, thereby reducing the processing burden on software without requiring additional computers

Inventive Principle:

Principle #24Intermediary (Mediator)

2Quantity of substance

If more processors are added to handle increased information volumes, then processing speed is improved, but information delivery latency increases

Engineering Contradiction:

Improveinformation volumeVSAvoiddelivery latency

Core Design Contradiction:

Quantity of substanceVSLoss of time

Solution Approach 1:

The patent replaces software-based processing with hardware-based processing using FPGA. The FPGA's parallel architecture and hardware implementation enable simultaneous processing of multiple data streams, achieving high-speed processing of large information volumes without the sequential bottlenecks inherent in software processing

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The FPGA performs preliminary processing actions including data parsing, validation, and routing decisions before data reaches software applications. This preliminary processing in hardware reduces the workload for subsequent software processing and enables faster end-to-end data delivery

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8548900B1FPGA memory paging

Publication Date: 2013.10.01 NYSE GROUP INC

AI summary

To improve the performance of a market data platform, a market data platform includes a hardware offload solution that allows received financial information to bypass the software portion of the platform and be written directly into memory. The hardware offload solution includes a field programmable gate array (FPGA) that takes over responsibility for some tasks that were previously performed in software. These tasks include performing line arbitrage on financial information feed pairs to ensure that an accurate copy of the financial information feed is obtained and stored in memory as quickly as possible. These tasks also include performing memory paging in order to allow financial orders to be stored and accessed in an efficient manner.