FPGA Multi-Boot Backup Configuration for Corrupted Data Recovery

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Solution Overview

Problem

Conventional FPGAs are vulnerable to defective and corrupted configuration data, lacking flexibility and resource efficiency.

Innovation Solution

A programmable semiconductor system (PSS) with a multi-boot with backup default configuration (MBC) operation, incorporating configurable logic blocks, routing connections, and dual-mode ports to handle configuration and user data, featuring a first memory for user-defined data and a second memory for backup default configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FPGA uses single configuration storage, then device complexity is low, but reliability deteriorates when configuration data becomes corrupted

Engineering Contradiction:

Improveconfiguration integrityVSAvoidstorage structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The configuration storage is segmented into multiple distinct memory regions: a primary configuration memory for user-defined configuration data and a secondary backup memory for default configuration data. This segmentation allows the system to maintain reliability by storing configuration data in separate locations, preventing corruption in one location from affecting the other, while managing complexity through clear functional separation of storage roles.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system implements beforehand cushioning by pre-storing backup default configuration data in a separate memory location before any corruption can occur. When configuration data is detected to be corrupted or invalid, the system can immediately switch to the pre-prepared backup configuration, cushioning against the harmful effects of data corruption without requiring complex real-time recovery operations.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Adaptability or versatility

If FPGA lacks backup configuration capability, then device complexity is low, but adaptability deteriorates when dealing with corrupted configuration data

Engineering Contradiction:

Improveconfiguration recovery capabilityVSAvoidmemory architecture

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system implements adaptability through copying by creating a duplicate backup copy of the default configuration data stored in a separate memory location. This copy allows the system to recover from corrupted configuration data by switching to the backup copy, providing versatility in handling configuration failures while maintaining manageable complexity through straightforward copying rather than complex replication mechanisms.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The backup memory acts as an intermediary between the primary configuration memory and the configuration loading process. When corruption is detected, the intermediary backup memory provides a valid configuration alternative, mediating the transition from corrupted to valid configuration state and enabling the system to adapt to failure conditions without requiring complex error recovery algorithms.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of operation

If dual-mode port is implemented, then ease of operation improves with unified data handling, but device complexity increases

Engineering Contradiction:

Improvedata transmission handlingVSAvoidport control logic

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The dual-mode port implements universality by designing a single port that can perform multiple functions: transmitting configuration data during configuration mode and transmitting user data during logic operation mode. This multi-functional design simplifies operation by eliminating the need for separate ports for different data types, while managing complexity through mode-based control logic that directs the port's behavior based on operational context.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12461672B2Method and system for enhancing programmability of a field programmable gate array

Publication Date: 2025.11.04 GOWIN SEMICON CORP LTD

AI summary

A programmable semiconductor system includes a programmable integrated circuit (“PIC”) and storage capable of facilitating a multi-boot with backup default configuration (“MBC”) process. The PIC, in one embodiment, includes configurable logic blocks (“LBs”), routing connections, and a configuration memory for performing logic functions. The storage includes a first and a second memory. While the first memory stores a user configuration data representing user-defined logic functions, the second memory stores a backup default page (“BDP”) containing default configuration data (“DCD”) for programming or booting PIC to its default setting when the user configuration data fails to boot or program PIC. In one aspect, the user configuration data contains the address of the second memory containing DCD.