FPGA Network Interface Offload for Flexible Protocol Processing
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Solution Overview
Problem
Existing network interface devices lack the flexibility and efficiency in processing data, particularly for specialized applications, as they often rely on fixed protocol stacks that burden the host computing device's processor and do not effectively utilize field programmable gate arrays (FPGAs) for customizable and high-performance data processing.
Innovation Solution
A network interface device is designed with a first and second field programmable gate array (FPGA) application, along with a transport engine, to process and transmit data, allowing for customizable data processing and offloading of protocol tasks from the host computing device, including functions like DDOS mitigation and machine learning, using interfaces to manage resource allocation and data flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed protocol stacks are used in network interface devices, then protocol processing can be performed, but the host computing device's processor is burdened and flexibility is reduced
Solution Approach 1:
The patent applies dynamics by making the network interface device reconfigurable through FPGA technology. The device can dynamically adapt its processing capabilities based on specific application requirements, transitioning from fixed protocol stacks to customizable data processing paths. This allows the host processor burden to be reduced while maintaining flexibility through hardware reconfiguration.
Solution Approach 2:
The patent extracts protocol processing functions from the host computing device's processor and implements them in the network interface device using FPGA and transport engine components. This extraction transfers the processing burden from the host to the network interface device, reducing the processor burden while maintaining or enhancing adaptability through programmable logic.
2Productivity
If field programmable gate arrays are used for customizable data processing, then data processing capabilities are enhanced, but device complexity increases
Solution Approach 1:
The patent merges FPGA applications with transport engine functionality in a unified network interface device. The FPGA handles customizable data processing while the transport engine manages protocol processing, and both are integrated within the same device architecture. This merging allows enhanced data processing capabilities while managing device complexity through coordinated design of the combined components.
3Adaptability or versatility
If multiple FPGA applications are implemented, then specialized processing functions are achieved, but resource management complexity increases
Solution Approach 1:
The patent introduces a fabric interface as an intermediary between multiple FPGA applications and the transport engine. This fabric interface manages resource allocation and data flow between different FPGA applications, enabling specialized processing functions while reducing resource management complexity through a standardized communication and coordination mechanism.
4Productivity
If protocol processing is performed in the network interface device, then host processor burden is reduced, but data transmission latency may increase
Solution Approach 1:
The patent segments data processing into multiple parallel paths: some data is directed to FPGA applications for specialized processing while other data is directed to the transport engine for protocol processing. This segmentation allows critical data to be processed with minimal latency while other data undergoes more extensive processing, thereby reducing host processor burden without uniformly increasing latency for all data streams.
Data Source
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AI summary
A network interface device comprising: first network interface device circuitry having an input port and a port coupled to an interface of the NID; host interface circuitry having an input port and an output port coupled the interface, said host interface circuitry comprising a scheduler configured to schedule the providing of data to the host device and/or the receiving of data from the host; and host offload circuitry configured to perform an offload operation for the host device, said host offload circuitry having an input port and an output port coupled to the interface, wherein said interface is configured to allow at least one of: data to be provided to said host interface circuitry from said first network device interface circuitry and/or said host offload circuitry; and data to be provided from said host interface circuitry to said first network interface device circuitry and/or said host offload circuitry.