Multi-Mode NVMe-oF Storage Device with FPGA and SSD
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Solution Overview
Problem
Existing network-attached storage devices face challenges in supporting both NVMe and NVMe-oF protocols efficiently, particularly in maintaining performance and cost-effectiveness with advancements in Ethernet speeds and SSD technologies, especially with fabric-attached SSDs requiring point-to-point connectivity and erasure code data protection.
Innovation Solution
A device configuration that includes a printed circuit board (PCB) with at least one SSD and a field programmable gate array (FPGA) connected via specific connectors, allowing operation in multiple Ethernet speeds without hardware changes, using common building blocks like switch boards and mid-planes to support both NVMe and NVMe-oF protocols, and enabling the use of new form factor SSDs like NF1 SSDs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a storage device supports both NVMe and NVMe-oF protocols with multi-speed Ethernet operation, then adaptability and versatility are improved, but device complexity increases
Solution Approach 1:
The storage device is designed with universal components that can operate in multiple protocols (NVMe and NVMe-oF) and multiple Ethernet speeds (10G, 25G, 50G, 100G) without requiring different hardware configurations. The FPGA and SSD combination serves multiple functions across different protocol modes, eliminating the need for separate hardware designs for each protocol variant.
Solution Approach 2:
The device dynamically adapts its operational mode based on the detected Ethernet speed and protocol requirements. The system can switch between NVMe and NVMe-oF protocols and adjust to different Ethernet speeds (10G, 25G, 50G, 100G) without physical hardware changes, using software and firmware configuration to optimize performance for each mode.
2Reliability
If fabric-attached SSDs use point-to-point connectivity for each device, then reliability and data protection are improved, but device complexity and integration difficulty increase
Solution Approach 1:
Multiple SSDs are combined and connected to a single FPGA through a shared PCIe interface, consolidating what would otherwise require multiple separate point-to-point connections. This merging approach maintains data protection through the FPGA's error correction and erasure code capabilities while reducing integration complexity by using a common interface for multiple devices.
Solution Approach 2:
The FPGA acts as an intermediary between the SSDs and the Ethernet interface, mediating the connection and handling protocol conversions. This intermediary role allows the system to maintain reliable point-to-point logical connections while using a shared physical interface, simplifying the physical integration while preserving data protection capabilities.
Data Source
AI summary
In an example, a device includes: a printed circuit board (PCB); at least one solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) mounted on the PCB at a second side of the PCB; and at least one connector attached to the PCB at a third side of the PCB, wherein the device is configured to operate in a first speed from a plurality of operating speeds based on a first input received via the at least one connector.