FPGA Partial Reconfiguration for Videoconference Codec Interoperability

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Solution Overview

Problem

The burden on processing capabilities and cost of multipoint control units (MCUs) in videoconferencing systems is significant due to the need to accommodate a large number of varying codec standards, which affects performance and reliability.

Innovation Solution

A partially reconfigurable programmable logic device (PLD) with a reconfigurable region and non-reconfigurable logic blocks for common codec operations, allowing the MCU to select and instantiate personas compatible with specific codec standards for each communication channel, reducing the need to continuously support all codecs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the MCU continuously supports all codec standards, then interoperability is improved, but processing burden and cost increase

Engineering Contradiction:
Improvecodec compatibilityVSAvoidprocessing burden
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The PLD is divided into reconfigurable and non-reconfigurable regions, allowing codec functionality to be segmented into modular personas that can be selectively instantiated based on current communication needs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically reconfigures the PLD by loading only the persona corresponding to the currently active codec standard, transforming the static all-inclusive architecture into a dynamic on-demand architecture

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the MCU supports a large number of codec standards, then interoperability is improved, but power consumption increases

Engineering Contradiction:
Improvecodec compatibilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts only the necessary codec functionality (specific persona) from the complete set of available codecs and loads it into the reconfigurable PLD region, eliminating the need to continuously power all codec support circuits

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

When a codec standard changes, the system discards the previous persona configuration and recovers resources by loading a new persona, ensuring that only currently needed functionality consumes power

Inventive Principle:
Principle #34Discarding and recovering

3Adaptability or versatility

If the PLD is fully reconfigurable, then adaptability is improved, but processing speed during reconfiguration deteriorates

Engineering Contradiction:
Improvecodec switching flexibilityVSAvoidreconfiguration time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

Multiple personas are pre-configured and stored in memory, allowing the system to quickly switch between codec standards by simply loading a pre-prepared persona rather than configuring from scratch

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Only the specific portion of the PLD required for the current codec (the persona) is reconfigured, while the remainder of the device continues operating without interruption, minimizing overall reconfiguration impact

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9191617B1Using FPGA partial reconfiguration for codec applications
Publication Date: 2015.11.17 ALTERA CORP
  • US9191617B1 patent drawing
  • US9191617B1 patent drawing
  • US9191617B1 patent drawing

AI summary

Various embodiments of the present disclosure enable interoperability between multiple codecs of various standards, notwithstanding that the number and type of standards in use at any particular time may vary unpredictably. A control unit, for example, a multipoint control unit (MCU) of a videoconference system, includes a partially reconfigurable programmable logic device (PLD). The PLD may include a reconfigurable region and a non-reconfigurable portion. The non-reconfigurable portion may include logic blocks for performing codec operations that are common across at least two codec standards. A selected subset a number of personas may be instantiated within the reconfigurable region of the PLD, each persona of the selected subset being compatible with at least a portion of the associated codec of at least one communication channel. The MCU selects, from between two or more personas, the selected subset of personas to be used within the reconfigurable region of the PLD.