FPGA Hardware Accelerated Pattern Indexing

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Solution Overview

Problem

Conventional indexing techniques are computationally intensive and time-consuming, making it impractical for enterprises to index large volumes of unstructured data, which constitutes the bulk of their data, leading to inefficient data management and search capabilities.

Innovation Solution

Hardware-accelerated metadata generation using a coprocessor, such as a reconfigurable logic device, to stream data and generate metadata at bus bandwidth rates, enabling the creation of rich indexes for efficient data searching and analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional indexing techniques are used, then data can be indexed with basic processing capabilities, but indexing latency is high and processing speed is slow

Engineering Contradiction:

Improveindexing speedVSAvoidindexing latency

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent replaces conventional software-based indexing mechanisms with hardware-accelerated processing using FPGAs and coprocessors. This substitution of mechanical/software systems with dedicated hardware circuits enables parallel processing of data streams, achieving bus bandwidth rates for metadata generation and dramatically reducing indexing latency while increasing processing speed.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces intermediate processing layers including FPGA-based coprocessors and metadata generation hardware that act as mediators between data sources and the main processing system. These intermediaries perform preliminary metadata extraction and indexing operations, offloading work from the main processor and enabling high-speed parallel processing without bottlenecking the overall system.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If hardware acceleration is implemented, then indexing speed increases and latency reduces, but device complexity increases

Engineering Contradiction:

Improveindexing throughputVSAvoidsystem complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the indexing system into distinct functional modules: data ingestion interfaces, FPGA-based coprocessors for metadata generation, hardware pattern matchers, and result aggregation components. Each segment handles specific processing tasks independently, enabling parallel operation and high throughput while maintaining manageable complexity through modular design and clear interface definitions.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9323794B2Method and system for high performance pattern indexing

Publication Date: 2016.04.26 CHARTER COMM OPERATING LLC

AI summary

Disclosed herein is a method and system for accelerating the generation of pattern indexes. In exemplary embodiments, regular expression pattern matching can be performed at high speeds on data to determine whether a pattern is present in the data. Pattern indexes can then be built based on the results of such regular expression pattern matching. Reconfigurable logic such a field programmable gate arrays (FPGAs) can be used to hardware accelerate these operations.