FPGA Board Sharing via PCIe Virtualization for Cloud VMs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In cloud servers, a limited number of FPGA boards restricts simultaneous activation of multiple virtual machines, leading to reduced user experience due to time-sharing limitations.

Innovation Solution

Establishing a PCIE virtual layer in the host system, where virtual PCIE devices are created in one-to-one correspondence with virtual machines, allowing multiple virtual machines to share an FPGA board through a PCIE virtual sub-layer, enabling simultaneous data processing according to preset sharing modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If one FPGA board is allocated to one virtual machine, then the reliability of data processing is improved, but the productivity of the cloud server deteriorates due to limited simultaneous activations

Engineering Contradiction:
Improvedata processing reliabilityVSAvoidcloud server processing capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the PCIE bus resource by introducing a virtualization layer that divides one physical PCIE bus into multiple virtual PCIE buses. Each virtual PCIE bus can be independently allocated to different virtual machines, allowing simultaneous access to the FPGA board. This segmentation resolves the contradiction by enabling multiple virtual machines to concurrently use the same physical FPGA resource without interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a PCIE virtualization layer as an intermediary between the physical FPGA board and multiple virtual machines. This intermediary layer manages resource allocation and enables time-multiplexed access, allowing multiple virtual machines to share the FPGA board while maintaining data processing reliability. The virtualization layer acts as a mediator that coordinates access from multiple virtual machines to a single physical resource.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple virtual machines share one FPGA board via time-sharing, then the productivity of the cloud server is improved, but the ease of operation deteriorates due to inability to activate simultaneously

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoidvirtual machine activation convenience
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

By segmenting the PCIE bus into multiple virtual instances, the patent enables each virtual machine to have its own dedicated virtual PCIE interface. This allows all virtual machines to be activated simultaneously with full access to FPGA resources, eliminating the time-sharing limitation while maintaining high resource utilization through the virtualization layer's resource management capabilities.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the quantity of FPGA boards is increased, then the productivity of the cloud server is improved, but the device complexity deteriorates due to limited PCIE connectors

Engineering Contradiction:
Improveprocessing capabilityVSAvoidhardware configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes a single physical FPGA board universal by enabling it to serve multiple virtual machines simultaneously through PCIE bus virtualization. Instead of requiring separate physical FPGA boards for each virtual machine, the system allows one FPGA board to perform multiple functions for different virtual machines concurrently. This multi-functionality approach increases processing capability without adding hardware complexity or requiring additional PCIE connectors.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11928493B2Sharing of FPGA board by multiple virtual machines
Publication Date: 2024.03.12 ZHENGZHOU YUNHAI INFORMATION TECH CO LTD
  • US11928493B2 patent drawing
  • US11928493B2 patent drawing
  • US11928493B2 patent drawing

AI summary

A method, system and apparatus for the sharing of an FPGA board by multiple virtual machines. Specifically, in the present application, a PCIE virtual layer (comprising a plurality of PCIE virtual sub-layers) and a virtual PCIE device are created; one virtual machine corresponds to one virtual PCIE device, multiple virtual PCIE devices correspond to one PCIE virtual sub-layer, and one PCIE virtual sub-layer corresponds to one FPGA board, thus enabling multiple virtual machines to share and use the FPGA board through one PCIE virtual sub-layer (that is, the multiple virtual machines share one PCIE bus, and same all access the FPGA board through the PCIE bus), thereby solving the problem of some of the virtual machines being unable to be started at the same time, and enhancing the experience effect of a user.