FPGA Service Manager for Shared Bitstream Allocation

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Solution Overview

Problem

Current information handling systems, particularly those using Field Programmable Gate Arrays (FPGAs), face challenges in efficiently managing shared services across multiple virtual machines due to limited reconfigurable regions and lack of dynamic resource allocation, leading to suboptimal performance and resource wastage.

Innovation Solution

An FPGA service manager within a hypervisor is implemented to manage the loading and reclamation of bitstreams for services across reconfigurable regions of an FPGA, dynamically tracking concurrent users and reallocating resources based on demand, ensuring efficient use of FPGA resources by loading and unloading bitstreams as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple virtual machines share FPGA resources, then resource utilization improves, but device complexity increases due to the need for dynamic management and tracking of concurrent users

Engineering Contradiction:
Improveresource utilizationVSAvoidmanagement complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an FPGA service manager as an intermediary component that mediates between virtual machines and FPGA resources. This service manager handles bitstream loading, user count tracking, and resource allocation, thereby simplifying the complexity by centralizing management functions rather than distributing them across multiple virtual machines.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The FPGA service manager performs multiple functions including loading bitstreams, tracking concurrent users, allocating FPGA regions, and managing resource reclamation. By consolidating these diverse functions into a single universal manager, the system improves resource utilization while avoiding the complexity of multiple separate management mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If FPGA regions are allocated to multiple virtual machines, then productivity improves through parallel processing, but loss of substance increases due to potential resource wastage when regions are not fully utilized

Engineering Contradiction:
Improveparallel processing capacityVSAvoidresource wastage
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The patent implements dynamic resource allocation where FPGA regions can be allocated to different virtual machines based on real-time demand. The service manager continuously monitors usage and can reclaim regions from idle virtual machines and reallocate them to active ones, ensuring that FPGA resources are always utilized efficiently while maintaining parallel processing capabilities.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements a recovery mechanism where FPGA regions are reclaimed when no longer needed. The service manager tracks concurrent users and automatically reclaims FPGA regions when the user count drops to zero, preventing resource wastage while allowing multiple virtual machines to access the same physical resources at different times.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If bitstreams are loaded into FPGA regions for each virtual machine, then reliability improves through dedicated service instances, but volume of substance increases due to multiple copies of the same bitstream

Engineering Contradiction:
Improveservice availabilityVSAvoidbitstream copies
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple virtual machine requests for the same service into a single FPGA region allocation. When multiple virtual machines request the same bitstream, the service manager checks if it's already loaded and allows concurrent access without creating duplicate copies, thereby reducing the quantity of bitstreams while maintaining service availability for all users.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system creates copies of bitstreams only when necessary - specifically when different virtual machines require simultaneous access to different instances of the same service. The service manager intelligently determines when copying is needed versus when shared access suffices, optimizing the balance between reliability and resource consumption.

Inventive Principle:
Principle #26Copying

4Loss of time

If FPGA resources are dynamically reallocated based on demand, then loss of time is reduced through efficient resource usage, but device complexity increases due to continuous monitoring and management overhead

Engineering Contradiction:
Improveresource idle timeVSAvoidmonitoring overhead
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The FPGA service manager implements a feedback mechanism that continuously monitors the usage state of FPGA regions and adjusts allocations accordingly. By tracking concurrent user counts and detecting when regions become idle, the system can automatically reallocate resources to eliminate idle time, with the monitoring overhead centralized in the service manager rather than distributed across the entire system.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10402219B2Managing shared services in reconfigurable FPGA regions
Publication Date: 2019.09.03 DELL PROD LP
  • US10402219B2 patent drawing
  • US10402219B2 patent drawing
  • US10402219B2 patent drawing

AI summary

An information handling system may include a field-programmable gate array (FPGA) and an FPGA service manager, within a hypervisor, to receive from software running in a virtual machine a request for an FPGA service, load a bitstream for the service into a first region of the FPGA, increment a count of concurrent users of the bitstream, determine, subsequent to a further update to the count, whether the count is zero or non-zero, and reclaim the first region of the FPGA if the count is zero. The bitstream may be received from the virtual machine or from a catalog of bitstreams maintained on the hypervisor. The FPGA service manager may load a second instance of the bitstream into a second region of the FPGA dependent on execution constraints specified in a bitstream header, or may load a bitstream for a second service into the second region of the FPGA.