FPGA Square Wave Generator Using Delay Chain Time Interpolation

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Solution Overview

Problem

Conventional square wave generators struggle to achieve high precision and low dead time, with existing solutions either limited by nanosecond precision or long dead times, failing to meet the requirements of modern scientific applications for high-speed and high-precision square waves.

Innovation Solution

A Field Programmable Gate Array (FPGA) based square wave generator that uses a USB bus control module, parallel-in serial-out conversion module, delay chain module, and multiplex controller to perform time interpolation, allowing for high-precision and continuous output of square waves with no dead time, utilizing a Virtex-7 FPGA for integration and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional square wave generators use high-speed clock and DDR storage, then generation speed is improved, but precision is limited to nanosecond order

Engineering Contradiction:
Improvesquare wave generation speedVSAvoidsquare wave precision
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent segments the square wave generation process into multiple independent channels, each with dedicated delay elements and control logic. This segmentation allows parallel processing of multiple square waves simultaneously, achieving both high speed and high precision by dividing the complex generation task into manageable, precise sub-tasks that can be executed concurrently without interfering with each other

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional time-domain generation to a multi-dimensional approach by introducing separate control dimensions for rise time, fall time, and period parameters. This dimensional expansion allows independent optimization of each parameter to picosecond precision while maintaining high generation speed, as each dimension can be controlled through dedicated FPGA logic paths

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If DTC based on vernier caliper method or high-performance delay PLL is used, then precision is improved to picosecond level, but dead time increases to microseconds

Engineering Contradiction:
Improvesquare wave precisionVSAvoiddead time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements preliminary action by pre-calculating and pre-loading all timing parameters (rise time, fall time, period) into the FPGA's block memory before square wave generation begins. The delay elements are pre-configured with precise delay values, and the state machine is pre-synchronized to the reference clock. This preliminary preparation eliminates the need for real-time calculations during operation, thereby achieving picosecond precision without introducing microsecond-level dead time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent ensures continuous useful action through a state machine that operates continuously without idle periods. The multi-channel architecture allows seamless transition between generating different square wave parameters, and the block memory is continuously fed with pre-calculated values. This continuous operation eliminates dead time between measurement cycles while maintaining picosecond precision through the established delay element network

Inventive Principle:
Principle #20Continuity of useful action

3Adaptability or versatility

If FPGA is used for square wave generation, then flexibility and adaptability are improved, but achieving high precision and low dead time simultaneously is difficult

Engineering Contradiction:
Improvesquare wave generation flexibilityVSAvoidsquare wave precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent utilizes parameter changes by allowing dynamic reconfiguration of delay element values, rise time parameters, fall time parameters, and period parameters through the FPGA's programmable logic. The block memory stores multiple sets of optimized parameters that can be loaded based on different measurement requirements. This parameter flexibility enables the system to adapt to various applications while maintaining picosecond precision through carefully selected and pre-optimized parameter sets for each specific use case

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3407145B1FPGA-based square-wave generator and square-wave generation method
Publication Date: 2024.05.01 UNIV OF SCI & TECH OF CHINA
  • EP3407145B1 patent drawingFigure 1~2
  • EP3407145B1 patent drawingFigure 3
  • EP3407145B1 patent drawingFigure 4

AI summary

An FPGA-based square-wave generator and a square-wave generation method. The generator comprises a bus control module for receiving a broadcast command and a broadcast address sent by an upper computer; a waveform broadcast management module for receiving the broadcast command and the broadcast address, reading original waveform data from a storage module according to the broadcast command and the broadcast address, decoding the original waveform data to obtain waveform data, generating delay data according to the waveform data, and outputting the waveform data and the delay data; a parallel-serial conversion unit for receiving waveform data input in parallel and serially outputting the waveform data to obtain a square-wave signal; a delay chain unit for delaying the square-wave signal; and a multi-path selection controller for receiving the delay data, determining an output node, for the square-wave signal, on the delay chain unit according to the delay data, and leading out a corresponding delayed square-wave signal from the output node and outputting the signal. By means of the present invention, square-wave signals with high accuracy and no dead time can be continuously output.