FPGA-Based SR Machine Controller Bandwidth Optimization
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Solution Overview
Problem
Current control systems for switched reluctance (SR) machines are limited by their bandwidth and efficiency, particularly in managing torque production and distribution, leading to suboptimal performance and increased energy consumption.
Innovation Solution
A control system utilizing a controller with parallel processing capabilities, implemented using a field programmable gate array (FPGA) and application-specific integrated circuit (ASIC), which generates torque commands based on bus voltage, machine current, and rotor speed, and selects current control parameters to optimize torque production and minimize ripple, allowing for both motoring and generating modes of operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional microprocessor-based control algorithms are used for SR machines, then the control system is simple to implement, but the operational bandwidth and response speed are limited
Solution Approach 1:
The patent replaces conventional microprocessor-based control with a Field-Programmable Gate Array (FPGA) implementation. This substitution transitions from software-based sequential processing to hardware-based parallel processing, dramatically increasing the operational bandwidth and response speed of the control system while maintaining programmability through the FPGA's reconfigurable logic elements.
Solution Approach 2:
The control algorithm is segmented into multiple independent parallel processing paths within the FPGA architecture. Different control functions (current regulation, torque control, position control) are implemented as separate modular blocks that can execute simultaneously, thereby increasing the overall operational bandwidth without proportionally increasing system complexity.
2Productivity
If higher bandwidth control is implemented to improve SR machine performance, then torque control and efficiency improve, but the complexity of the control system increases
Solution Approach 1:
The patent implements high-bandwidth control through FPGA-based hardware logic that executes control algorithms in parallel rather than sequentially. This hardware implementation achieves superior torque control efficiency and response time while managing complexity through the FPGA's inherent parallel architecture and deterministic timing characteristics.
Solution Approach 2:
The control system dynamically adapts its behavior through the FPGA's ability to implement real-time, high-speed feedback loops. The system can rapidly adjust control parameters and respond to changing operating conditions, achieving high productivity through dynamic optimization rather than static control configurations.
3Loss of time
If parallel processing is used to reduce loop times, then the operational bandwidth increases, but the device complexity increases
Solution Approach 1:
The patent replaces sequential microprocessor-based loop execution with parallel FPGA logic circuits that compute multiple control variables simultaneously. This hardware parallelism dramatically reduces loop execution time by eliminating the sequential bottlenecks inherent in software-based control, achieving sub-microsecond response times.
Solution Approach 2:
The patent merges multiple control functions and processing stages into a unified parallel FPGA architecture. By integrating current sensing, processing, and actuation logic into a single synchronized hardware system, the design reduces overall loop time while managing complexity through functional integration rather than separate discrete components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly enhances the operational bandwidth and efficiency of SR machines by reducing loop times and improving torque control, resulting in smoother and more efficient energy conversion in various industrial applications.
Implementation Method 1
A control system utilizing a controller with parallel processing capabilities, implemented using a field programmable gate array (FPGA) and application-specific integrated circuit (ASIC)
Implementation Method 2
the electric drive selectively enables switches or gates associated with each phase of the stator so as to cause electromagnetic interactions between the stator and rotor poles and rotate the rotor relative to the stator at a desired torque and/or speed
Implementation Method 3
An SR machine is typically used to convert mechanical power received from a primary power source, such as a combustion engine, into electrical power for performing one or more operations of the machine
Data Source
AI summary
A control system for a switched reluctance (SR) machine is provided. The control system may include a converter circuit that is operatively coupled to the SR machine, and a controller in communication with the converter circuit. The controller may be configured to execute two or more processes in parallel, wherein the processes include generating a torque command based on one or more of bus voltage, machine current, rotor speed and rotor position, determining a first set of current control parameters based on the torque command and the rotor speed, determining a second set of current control parameters based on one or more of the torque command, the rotor speed and the rotor position, selecting one of the first and second sets of current control parameters based on the rotor speed, and operating the gates according to the selected set of current control parameters.