FPGA-Enabled SSD Architecture for Query Processing Bottlenecks

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Solution Overview

Problem

Conventional storage devices are inefficient when handling large databases, requiring significant data transfer to memory for query operations, leading to memory displacement and resource wastage, especially when repeated queries are performed.

Innovation Solution

Implementing a Field Programmable Gate Array (FPGA) in conjunction with a Solid State Drive (SSD) to accelerate data processing by filtering and processing PCIe transactions directly on the SSD, reducing the need to load data into host memory and optimizing memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is loaded into host memory for query operations, then query processing can be performed, but memory resources are consumed and data must be transferred from storage device

Engineering Contradiction:
Improvequery processing speedVSAvoidmemory usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The system segments processing tasks between the host processor and the storage device's embedded processor. The embedded processor independently handles query operations on data remaining in storage, while the host processor manages higher-level coordination, eliminating the need to load entire datasets into host memory.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of processing by embedding a processor directly within the storage device. This creates a distributed processing architecture where computation occurs at the data location rather than requiring centralized processing at the host, fundamentally changing the data processing paradigm.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If large databases are loaded into memory for repeated queries, then query operations can be performed quickly, but significant memory resources are consumed and data must be repeatedly transferred

Engineering Contradiction:
Improvedata retrieval speedVSAvoidenergy consumed for data transfer
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The embedded processor performs query operations directly on data while it remains in storage format, eliminating the need for preliminary data transfer to host memory. The data is processed in its native storage state, and only relevant results are transferred back to the host.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If conventional storage devices handle all processing, then device simplicity is maintained, but processing efficiency decreases for complex queries

Engineering Contradiction:
Improvestorage device structureVSAvoiddata processing efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The storage device is enhanced with multi-functionality by integrating an embedded processor that can execute query operations directly on stored data. This allows the storage device to perform both traditional storage functions and computational tasks, reducing the need for data transfer and improving processing efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11892957B2SSD architecture for FPGA based acceleration
Publication Date: 2024.02.06 SAMSUNG ELECTRONICS CO LTD
  • US11892957B2 patent drawing
  • US11892957B2 patent drawing
  • US11892957B2 patent drawing

AI summary

A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.