FPGA Switchbox Multiplexer Layout for Low-Delay Signal Routing
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Solution Overview
Problem
Existing switchboxes in integrated circuits with programmable logic face challenges in signal amplification and delay issues due to the need for multiple configuration bits and components, which increase chip area and signal degradation with complex connections.
Innovation Solution
A switchbox design utilizing a minimal number of multiplexers and configuration bits, incorporating 1-to-2 direction change multiplexers and 4-to-1 direction change multiplexers to efficiently route signals in both forward and changed directions, reducing the need for tristate gates and minimizing delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If transmission gates are used for signal routing, then the chip area is reduced, but signal amplification is lost and signal delay increases significantly
Solution Approach 1:
The patent combines the routing function and signal amplification function into a single multiplexer component. Instead of using separate transmission gates for routing and separate amplifiers for signal regeneration, the invention integrates both functions into the multiplexer itself, allowing signal direction change and amplitude restoration in one component.
Solution Approach 2:
The multiplexer is designed to perform multiple functions: it acts as both a signal router (switching between different input paths) and a signal amplifier (restoring signal edges). This multi-functionality eliminates the need for dedicated amplifiers and reduces the overall component count while maintaining signal quality.
2Reliability
If multiplexers with signal amplification are used, then signal edge steepness is maintained, but the number of configuration bits and chip area increase considerably
Solution Approach 1:
The patent divides the signal routing function into multiple segments handled by different multiplexers at different levels. First-level multiplexers handle local routing decisions with fewer configuration bits, while second-level multiplexers handle broader direction changes. This segmentation allows each multiplexer to use a minimal number of configuration bits while collectively achieving complex routing capabilities.
Solution Approach 2:
The invention introduces a hierarchical structure with multiple levels of multiplexers, adding a dimensional aspect to the routing architecture. Instead of using a single complex multiplexer with many configuration bits, the system uses multiple simpler multiplexers organized in levels, where each level handles a specific aspect of the routing decision.
3Reliability
If multiple multiplexers and tristate buffers are used for signal routing, then signal amplification is achieved, but signal delay increases after several connections
Solution Approach 1:
The patent extracts the amplification function from separate amplifier components and integrates it directly into the multiplexer structure. By taking out the need for dedicated amplifiers and embedding the amplification capability within the routing components themselves, the system maintains signal strength without adding extra delay stages.
Data Source
AI summary
Switchboxes are especially used in integrated circuits with programmable logic (e.g. FPGAs). They are used to establish configurable signal paths between logic blocks. The present invention is based on the task to present a switchbox with a small number of multiplexers and configuration bits, which can both forward a signal in signal direction and can implement a change of direction.The task is solved by using switchboxes consisting of direction multiplexers and at least one direction change multiplexer. Thus the signal direction can be changed arbitrarily without increasing the size of the direction change multiplexers.