FPGA TCP Reassembly Queue for Time-Sensitive Message Ordering

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Solution Overview

Problem

Existing systems fail to ensure time-sensitive processing of TCP segments into application layer messages due to the loss of ordering information across TCP connections, leading to unfair and random delivery of packets.

Innovation Solution

A FPGA-based middleware system that analyzes TCP segments using session-based information to reassemble messages in a time-sensitive queue, ensuring delivery in the order of arrival without reordering across layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional layered network stack is used for TCP segment processing, then system complexity is reduced and ease of operation is improved, but time-sensitive ordering is lost and packets are delivered in random order

Engineering Contradiction:
Improvetime-sensitive orderingVSAvoidnetwork stack complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary component (time-sensitive queue and reassembly buffer) between the TCP layer and application layer that preserves packet arrival order. This intermediary maintains session-based information and reassembles TCP segments in the correct time-sensitive sequence before delivering to the application, thus preserving ordering without requiring complete redesign of the network stack.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the message reassembly process into distinct functional components: TCP segment reception, session-based information extraction, time-sensitive queue management, and application layer delivery. This segmentation allows each component to handle specific aspects of the ordering problem independently, managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

2Productivity

If TCP segments are reassembled without time-sensitive ordering, then processing speed is improved and latency is reduced, but message integrity is compromised and delivery order becomes random

Engineering Contradiction:
Improveprocessing speedVSAvoidordering information
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent performs preliminary actions by extracting and storing session-based information (including ordering metadata) from TCP segments as they arrive. This information is preserved in the time-sensitive queue before reassembly occurs, ensuring that ordering information is captured upfront and can guide the reassembly process without requiring complex real-time analysis.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where the time-sensitive queue continuously monitors packet arrival sequences and uses session-based information to regulate the reassembly process. This feedback ensures that segments are reassembled in the correct time-sensitive order while maintaining high processing throughput, as the queue dynamically adjusts based on incoming segment patterns.

Inventive Principle:
Principle #23Feedback

3Productivity

If packets are delivered in random order to improve throughput, then resource utilization is improved, but time-sensitive applications suffer and transaction accuracy deteriorates

Engineering Contradiction:
ImprovethroughputVSAvoidtransaction accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by treating different application requirements differently. For time-sensitive applications, the system preserves strict ordering through the time-sensitive queue and session-based reassembly. For other applications, more flexible processing may be applied. This localized approach ensures transaction accuracy for time-critical operations while maintaining overall system throughput.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12506818B2Method and system for time sensitive processing of TCP segments into application layer messages
Publication Date: 2025.12.23 TATA CONSULTANCY SERVICES LTD
  • US12506818B2 patent drawing
  • US12506818B2 patent drawing
  • US12506818B2 patent drawing

AI summary

This disclosure relates to time sensitive processing of TCP segments into application layer messages in FPGA. Certain applications such as “stock market” or “ticket booking system” require a time sensitive ordering of the transaction, as the timing of arrival of transaction (packet) will impact the result, wherein the time sensitive ordering occurs when a first packet reaching the application network is processed first or the processing of packets by the server is guaranteed in the order of packets received. However, the existing systems do not honor the time due to the layered network stack. The disclosure is a design and implementation of a middleware framework on FPGA platform which delivers messages to the application in the order in which they arrive. The disclosure enables time sensitive analysis of each message of the TCP segment based on the session-based information to re-assemble the plurality of messages in a time-sensitive queue.