FPGA Thermal Diode Switching for Accurate Sensing With Fewer Package Balls

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Solution Overview

Problem

The accuracy of temperature calibration in integrated circuits is compromised by the distance between thermal diodes and temperature sensing elements, which reduces the number of connections available for other components due to bonding.

Innovation Solution

Implementing thermal diodes that selectively couple to a single pair of package balls via switches, allowing multiple diodes to share connections, thereby reducing the number of package balls used by diodes and increasing availability for other components, and improving calibration accuracy by positioning diodes proximate to sensing elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If thermal diodes are bonded to the integrated circuit device, then temperature measurement accuracy is improved, but the number of connections available to other components is reduced

Engineering Contradiction:
Improvetemperature measurement accuracyVSAvoidnumber of connections
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple thermal diodes share a common bonding pad, merging their connection requirements into a single physical interface. This reduces the total number of bonding pads needed while maintaining the ability to individually address and use each thermal diode for temperature sensing at different locations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common bonding pad serves multiple functions by being shared among multiple thermal diodes. This universal connection point allows the same physical resource to support multiple temperature sensing operations simultaneously or sequentially, reducing overall connection requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If the distance between thermal diode and temperature sensing element is reduced, then calibration accuracy is improved, but the number of available connections is reduced

Engineering Contradiction:
Improvecalibration accuracyVSAvoidnumber of connections
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Multiple thermal diodes positioned at different locations share common bonding pads, allowing each diode to be placed close to its corresponding temperature sensing element for high calibration accuracy while the shared bonding infrastructure reduces the total connection count.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances calibration accuracy and reduces isothermality effects while decreasing the size and power consumption of integrated circuits, allowing for a cost-effective and scalable thermal diode implementation.

Implementation Method 1

The integrated circuit may include thermal diodes that measure a temperature of a region of the integrated circuit

Methodology Applied
Scientific EffectThermal diode temperature measurement: Diode

Data Source

PatentUS20250323111A1Scalable Thermal Diode Implementation in Monolithic and Multi-Die FPGAs
Publication Date: 2025.10.16 LUM YEE KIN
  • US20250323111A1 patent drawing
  • US20250323111A1 patent drawing
  • US20250323111A1 patent drawing

AI summary

Systems or methods of the present disclosure may provide for any suitable number of thermal diodes selectively coupled to a single pair of package balls via a plurality of switches. That is, multiple thermal diodes may all be coupled to the single pair of package balls, which reduces a number of package balls coupled to the thermal diodes and increases a number of package balls available to other components. Additionally or alternatively, reducing the number of package balls coupled to the thermal diodes may reduce a size of the systems of the present disclosure.