FPGA Virtual Fabric Streaming Networks for Runtime Kernel Reconfiguration
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Solution Overview
Problem
Current programmable logic devices, such as FPGAs, require lengthy compile times for high-level language programming, especially when logic designs need frequent changes during development, and host-centric models impose practical limits on data buffer sizes and synchronization requirements, making it inefficient for dynamic applications.
Innovation Solution
Implementing a dynamic streaming network with a virtual fabric on FPGAs that allows for runtime reconfiguration of communication topology between computational kernels using OpenCL, enabling the use of high-level languages like OpenCL to configure programmable devices, and utilizing partial reconfiguration blocks to add or remove kernels dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If high-level language programming is used on FPGAs, then ease of operation is improved, but compilation time increases significantly
Solution Approach 1:
The patent applies preliminary action by pre-compiling high-level language code into intermediate representation during software development, and further pre-configuring this into FPGA logic before deployment. This multi-stage pre-processing eliminates the need for lengthy compilation at deployment time, resolving the contradiction between ease of high-level programming and compilation time overhead.
2Device complexity
If static configuration is used, then device complexity is reduced, but adaptability deteriorates
Solution Approach 1:
The patent implements dynamics by enabling runtime reconfiguration of FPGA logic through a virtual fabric architecture. Kernels can be dynamically added, removed, or modified during operation, allowing the system to adapt to changing application requirements while maintaining manageable complexity through automated configuration management.
Solution Approach 2:
The virtual fabric serves as a universal configuration mechanism that can accommodate multiple kernel types and communication patterns through a unified interface. This multi-functional approach allows diverse applications to be supported without increasing overall system complexity, as the same virtual fabric infrastructure handles all reconfiguration needs.
3Ease of operation
If host-centric model is used, then ease of operation is improved, but data buffer size and synchronization are constrained
Solution Approach 1:
The patent extracts the host controller from the data processing path by implementing direct kernel-to-kernel communication through the virtual fabric. This eliminates the host-centric bottleneck, allowing data to flow directly between kernels without being funneled through host memory, thereby removing buffer size and synchronization constraints while maintaining programming simplicity.
4Adaptability or versatility
If frequent logic design changes are made, then adaptability is improved, but compilation time increases
Solution Approach 1:
The patent enables dynamic reconfiguration where logic design changes can be made at runtime without full system recompilation. The virtual fabric allows individual kernels to be modified, added, or removed independently, providing design flexibility while minimizing reconfiguration time through targeted updates rather than complete system recompilation.
Data Source
AI summary
A method of configuring a programmable integrated circuit device. A channel source within the virtual fabric is configured to receive input data from a first kernel outside of the virtual fabric and on the programmable integrated circuit device, and a channel sink within the virtual fabric is configured to transmit output data to the first kernel. The configuring of the channel source is modified such that the channel source receives input data from a second kernel in response to detecting a change in operation of the programmable integrated circuit device.