FPGA Virtual Fabric Streaming for Runtime Kernel Reconfiguration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current programmable logic devices, such as FPGAs, require lengthy compilation times for high-level language designs using OpenCL, and existing programming models with static topologies are inefficient for applications needing dynamic reconfiguration, especially during development and in scenarios where multiple kernels operate in parallel.
Innovation Solution
Implementing a dynamic streaming network with a virtual fabric on FPGAs, allowing for runtime reconfiguration of channel sources and sinks, and using partial reconfiguration blocks to adapt kernel communication topologies, enabling efficient data flow and kernel replication based on application needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If static topology programming models are used on FPGAs, then device configuration is simplified, but compilation times become lengthy and performance cannot adapt to changing application characteristics
Solution Approach 1:
The patent implements a dynamic streaming network where the topology can be reconfigured at runtime. The virtual fabric allows channel sources and sinks to be dynamically connected to different kernels based on application needs, enabling the system to adapt to changing characteristics without requiring full recompilation. This dynamic reconfiguration capability directly addresses the contradiction by allowing the system to be both adaptive and time-efficient.
Solution Approach 2:
The patent segments the FPGA device into multiple partial reconfiguration blocks that can be independently configured. Each block can be reconfigured without affecting other blocks, allowing selective updates to specific kernel communication topologies. This segmentation enables faster reconfiguration compared to full device reconfiguration, reducing the time loss while maintaining adaptability.
2Productivity
If host-centric programming models are used, then programming simplicity is maintained, but processing efficiency decreases for parallel kernel operations
Solution Approach 1:
The patent introduces a virtual fabric as an intermediary layer between kernels and the host system. This virtual fabric manages communication and data flow between parallel kernels independently of the host, enabling efficient parallel processing without requiring complex host-centric coordination. The virtual fabric handles the complexity of inter-kernel communication, allowing kernels to operate in parallel with improved productivity while reducing the programming burden on the host.
3Adaptability or versatility
If dedicated circuits are added for commonly-used functions, then device functionality is enhanced, but device complexity and reconfiguration flexibility are reduced
Solution Approach 1:
The patent implements a universal virtual fabric that can perform multiple functions including routing, buffering, and kernel management. Rather than adding dedicated circuits for each function, the virtual fabric provides multi-functional capabilities through software configuration, maintaining reconfiguration flexibility while enhancing device functionality. This approach allows the same hardware resources to be dynamically allocated for different purposes based on application requirements.
Data Source
AI summary
A method of configuring a programmable integrated circuit device. A channel source within the virtual fabric is configured to receive input data from a first kernel outside of the virtual fabric and on the programmable integrated circuit device, and a channel sink within the virtual fabric is configured to transmit output data to the first kernel. The configuring of the channel source is modified such that the channel source receives input data from a second kernel in response to detecting a change in operation of the programmable integrated circuit device.