FPGA Waveform Capture with Dynamic Phase-Shifting Calibration

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Solution Overview

Problem

Field-programmable gate arrays (FPGAs) face challenges in generating reliable picosecond time-intervals for device calibration and signal distortions due to uncontrollable delays and variations in logic elements, limiting their effectiveness in precision timing applications.

Innovation Solution

A 5 picosecond-resolution time-to-digital converter/ultra-fast digital oscilloscope hybrid implemented on an FPGA, utilizing dynamic phase-shifting calibration and carry-chains to capture digital waveforms without encoding, with a tapped delay line and phase-lock loop for precise time-interval generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If FPGAs are used for precision timing measurements, then adaptability and reconfigurability are improved, but signal distortions and timing reliability deteriorate due to uncontrollable delays in logic elements

Engineering Contradiction:
ImprovereconfigurabilityVSAvoidtiming reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the FPGA logic path into distinct functional blocks: a stable on-board clock source, a tapped delay line with controlled delay elements, and a time-to-digital converter. By segmenting the timing path and isolating the measurement function from general logic elements, the design achieves picosecond-resolution timing while maintaining FPGA reconfigurability for other functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a dedicated tapped delay line as an intermediary component between the clock source and the measurement logic. This intermediary structure provides controlled, predictable delay paths that are independent of the FPGA's general logic element variations, thereby resolving the conflict between using reconfigurable FPGAs and achieving reliable precision timing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If conventional TDC calibration methods are used in FPGAs, then device functionality is achieved, but calibration complexity and resource requirements increase

Engineering Contradiction:
Improvecalibration simplicityVSAvoidcalibration complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent changes the calibration approach by using a stable on-board clock with known frequency characteristics and a tapped delay line with predictable propagation delays. By changing from external calibration references to internal FPGA-based timing references, the system simplifies calibration while reducing resource requirements and eliminating the need for complex external calibration equipment.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If picosecond time-intervals are generated for calibration, then measurement precision is improved, but resource requirements and device complexity increase

Engineering Contradiction:
Improvetime-interval precisionVSAvoidresource requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements self-service by using the FPGA's own stable on-board clock and internal tapped delay line structures to generate picosecond time-intervals for calibration. This eliminates the need for external precision timing equipment and reduces resource requirements, as the FPGA serves its own calibration needs using its inherent resources.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20260023145A15-PS-resolution waveform-capture-device on a field-programmable gate-array with dynamic phase-shifting
Publication Date: 2026.01.22 POTOMAC RES LLC
  • US20260023145A1 patent drawing
  • US20260023145A1 patent drawing
  • US20260023145A1 patent drawing

AI summary

A waveform capture device (WCD) is a flexible measurement system capable of recording complex digital signals on trillionth-of-a-second (ps) time scales. The WCD may be implemented via modular code on an off-the-shelf field-programmable gate-array (FPGA) and incorporates both time-to-digital converter (TDC) and digital storage oscilloscope (DSO) functionality. The device captures a waveform by taking snapshots of a signal as it propagates down an ultra-fast transmission line known as a carry chain (CC). It may be calibrated via a dynamic phase-shifting (DPS) method that requires substantially less data and resources than conventional techniques.