Reconfigurable FPMAC Unit for Variable Precision Deep Learning
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Solution Overview
Problem
Current DNN accelerators typically support FP16 formats but lack support for FP8 formats, leading to inefficiencies in energy consumption and resource utilization, as they require separate implementations for different precision levels, which increases area and energy overhead.
Innovation Solution
The development of a reconfigurable FPMAC unit that supports both FP16 and FP8 formats, allowing for variable floating-point precision operations by reconfiguring FP16 mantissa multiply into a two-way FP8 dot-product, reducing energy overhead and enabling efficient computation across multiple input format encodings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate implementations are used for different precision levels (FP16 and FP8), then precision support is comprehensive, but area and energy overhead increase
Solution Approach 1:
The FPMAC unit is designed with a reconfigurable mantissa multiply module that can dynamically switch between FP16 and FP8 operation modes. The same hardware circuit performs both precision levels by reconfiguring its internal data paths and control logic, eliminating the need for separate dedicated circuits for each precision format.
Solution Approach 2:
The mantissa multiply module incorporates dynamic control signals that adjust the operation mode based on the input data precision. Control logic dynamically reconfigures the data path width, exponent handling, and mantissa multiplication parameters to match the required precision format, enabling adaptive resource utilization.
2Adaptability or versatility
If separate implementations are used for different precision levels (FP16 and FP8), then precision support is comprehensive, but energy overhead increases
Solution Approach 1:
A single reconfigurable mantissa multiply module serves both FP16 and FP8 operations, consolidating energy-consuming circuitry into one shared resource. This eliminates redundant energy expenditure that would occur if separate dedicated modules were implemented for each precision format.
Solution Approach 2:
The module changes its operational parameters (data path width, exponent bias, mantissa bit depth) dynamically based on the input precision format. By adjusting these parameters rather than using fixed hardware for each format, the system optimizes energy consumption for the current operation mode while maintaining support for multiple precisions.
3Area of stationary object
If reconfigurable FPMAC unit is used, then area is reduced, but device complexity increases
Solution Approach 1:
The reconfiguration control logic uses dynamic signaling to switch between FP16 and FP8 modes, allowing a single static hardware structure to perform multiple functions. The control signals adjust data path widths, exponent handling, and mantissa multiplication parameters on-the-fly, reducing the need for multiple dedicated circuits while managing complexity through temporal rather than spatial differentiation.
Data Source
AI summary
A fused dot-product multiply-accumulate (MAC) circuit may support variable precisions of floating-point data elements to perform computations (e.g., MAC operations) in deep learning operations. An operation mode of the circuit may be selected based on the precision of an input element. The operation mode may be a FP16 mode or a FP8 mode. In the FP8 mode, product exponents may be computed based on exponents of floating-point input elements. A maximum exponent may be selected from the one or more product exponents. A global maximum exponent may be selected from a plurality of maximum exponents. A product mantissa may be computed and aligned with another product mantissa based on a difference between the global maximum exponent and a corresponding maximum exponent. An adder tree may accumulate the aligned product mantissas and compute a partial sum mantissa. The partial sum mantissa may be normalized using the global maximum exponent.