FPOA Video Compression Co-Processor for Fast Motion Estimation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current video data compression techniques, even when utilizing powerful processing capabilities of field-programmable object arrays (FPOAs), are costly and have less than ideal operating performance due to the computational intensity of motion estimation, particularly in high-definition video data.
Innovation Solution
An integrated circuit architecture featuring a video compression co-processor integrated within a programmable integrated circuit, comprising a configurable array of elements, search engines, and a subpixel engine, which offloads video data compression tasks, providing dedicated circuitry for motion estimation and interpolation, thereby reducing design complexity and increasing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If motion estimation is performed using FPOA for video data compression, then compression capability is improved, but processing cost and complexity increase
Solution Approach 1:
The patent extracts the computationally intensive motion estimation function from the general-purpose FPOA and implements it as a dedicated video compression co-processor. This separates the specialized video processing tasks from the programmable array, reducing the complexity burden on the FPOA while maintaining compression capability.
Solution Approach 2:
The FPOA is designed to serve multiple purposes: it can perform video compression tasks when needed, while also being reconfigurable for other computational tasks. The co-processor handles specialized video functions, allowing the FPOA to maintain universality and flexibility without being dedicated solely to video processing.
2Measurement precision
If motion estimation is performed on high-definition video data, then video quality is improved, but computational intensity and processing time increase
Solution Approach 1:
The video processing system is segmented into distinct functional units: the video compression co-processor handles motion estimation specifically, while the FPOA handles other processing tasks. This segmentation allows parallel processing of different aspects of video compression, reducing overall processing time for high-definition content.
Solution Approach 2:
The video compression co-processor acts as an intermediary between the raw video data and the FPOA. It pre-processes the video data by performing motion estimation and preparing compressed representations, which then can be further processed by the FPOA or transmitted, reducing the computational burden on subsequent processing stages.
3Productivity
If dedicated video compression circuitry is added to FPOA, then operating performance is improved, but design complexity increases
Solution Approach 1:
The video compression co-processor is designed and integrated in advance with predetermined interfaces and communication protocols with the FPOA. This preliminary design work establishes clear boundaries and interaction patterns, reducing the complexity of integrating dedicated video compression circuitry with the programmable array.
Data Source
AI summary
A field programmable object array integrated circuit has video data compression capability. The integrated circuit comprises an array of programmable objects and a video compression co-processor communicatively coupled to the array of objects. The video compression co-processor comprises a set of search engines and a subpixel engine. The subpixel engine can interpolate subpixels from integer pixels and shift the integer pixels by a predetermined number of subpixels. The search engines can perform a plurality of sum of absolute differences (SAD) computations between search window pixels and macroblock pixels to locate the best SAD value using either integer pixels and/or the interpolated subpixels.