FPOA Image Processing Circuitry With Subpixel Motion Search
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Solution Overview
Problem
Current field-programmable object arrays (FPOAs) face challenges in efficiently implementing video data compression, as existing technologies are costly and have less than ideal operating performance, despite their powerful processing capabilities.
Innovation Solution
An integrated circuit architecture with a video compression co-processor integrated within a programmable integrated circuit, featuring a configurable array of elements, search engines, and a subpixel engine, which offloads video data compression tasks, allowing for flexible configuration and high-performance processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If motion estimation is implemented using FPOA for video data compression, then processing capability is improved, but device complexity and cost increase
Solution Approach 1:
The FPOA is divided into multiple programmable objects including ALUs, MACs, and memory banks that can be independently configured. This segmentation allows the system to implement motion estimation algorithms by distributing computational tasks across multiple specialized units, improving processing capability while managing complexity through modular design
Solution Approach 2:
The programmable objects in the FPOA are designed to perform multiple functions - ALUs can perform various arithmetic operations, MACs can handle different multiplication-accumulation tasks, and memory banks can serve different data storage needs. This multi-functionality allows a single FPOA configuration to handle various video compression algorithms and operations, reducing overall system complexity
2Productivity
If FPOA is used for video data compression, then processing power is improved, but manufacturing cost increases
Solution Approach 1:
The FPOA employs dynamic reconfiguration capabilities where programmable objects can be programmed and reprogrammed to perform different functions based on the specific video compression task at hand. This dynamic adaptability allows the same hardware infrastructure to serve multiple purposes, improving processing power for video compression while avoiding the need for multiple specialized circuits, thereby reducing manufacturing costs
3Manufacturing precision
If high definition video data is processed, then video quality is improved, but computational intensity and processing time increase
Solution Approach 1:
The FPOA segments the video data processing into multiple parallel computational paths using arrays of ALUs and MACs. Each processing unit can handle a portion of the high definition video data simultaneously, maintaining high video quality through precise calculations while reducing overall processing time through parallel execution
Solution Approach 2:
The FPOA configuration includes pre-configured data paths and memory banks that are prepared in advance for high definition video processing. Search windows and macroblocks are pre-loaded into memory banks, and computational algorithms are pre-programmed into the programmable objects, allowing immediate high-speed processing when video data arrives, thus reducing processing time while maintaining quality
Data Source
AI summary
A field programmable object array integrated circuit has video data compression capability. The integrated circuit comprises an array of programmable objects and a video compression co-processor communicatively coupled to the array of objects. The video compression co-processor comprises a set of search engines and a subpixel engine. The subpixel engine can interpolate subpixels from integer pixels and shift the integer pixels by a predetermined number of subpixels. The search engines can perform a plurality of sum of absolute differences (SAD) computations between search window pixels and macroblock pixels to locate the best SAD value using either integer pixels and/or the interpolated subpixels.