Fractal DAC Layout for Uniform Data Paths and Better Linearity
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Solution Overview
Problem
The physical and logical layout of unit cells in traditional DACs affects the speed and linearity of operation, leading to inefficiencies and potential power wastage.
Innovation Solution
Implementing a fractal arrangement of unit cells and transmission lines, combined with thermometer coding, to unify data path lengths and simplify decision unit operations, thereby enhancing speed, linearity, and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional column and line DAC layouts are used, then the DAC can be manufactured with standard approaches, but the data path length to different unit cells varies affecting speed and linearity
Solution Approach 1:
The patent applies asymmetry by inverting the conventional DAC architecture: instead of having a central input with radiating data paths of varying lengths, the fractal DAC uses multiple inputs at the periphery with unified data paths of equal length converging to unit cells. This asymmetric inversion resolves the data path length variation problem while maintaining manufacturability through systematic layout patterns.
2Manufacturing precision
If traditional DAC layouts with varying data path lengths are used, then manufacturing is simpler, but linearity is degraded due to non-uniform signal propagation
Solution Approach 1:
The fractal DAC architecture segments the DAC into multiple identical modular units arranged in a fractal pattern. Each segment (unit cell group) has the same data path length and structure, which can be manufactured using repeated patterns. This segmentation approach improves linearity through uniformity while maintaining ease of manufacture through modular replication.
Solution Approach 2:
The patent employs a nested fractal structure where the DAC layout contains self-similar patterns at different scales. The overall architecture is composed of smaller identical fractal units nested within larger fractal structures, creating a hierarchical organization that ensures uniform data path lengths while providing a systematic manufacturing approach through pattern repetition.
3Speed
If gate cells and data reprocessing are included to manage unit cell operations, then unit cell control is achieved, but speed is reduced and power consumption increases
Solution Approach 1:
The fractal DAC architecture extracts and eliminates the need for gate cells and complex data reprocessing logic by directly connecting inputs to unit cells through unified data paths. The decision unit operations are simplified to basic comparisons without requiring additional gate cells or data reprocessing stages, thereby increasing operating speed while reducing device complexity.
Data Source
AI summary
An electronic device may include digital circuitry to operate via digital signals and analog circuitry to operate via analog signals. The electronic device may also include a fractal digital to analog converter (DAC) to convert a digital signal into an analog signal. The fractal DAC may include a unit cell array having a branching data path and multiple unit cells disposed in a fractal pattern. The fractal DAC may also include multiple decision units disposed within the unit cell array on the branching data path. Each decision unit may receive an incoming signal representative of at least a portion of the digital signal and direct each decision unit output to different branches of the unit cell array. The unit cells may be enabled based at least in part on the decision unit outputs to generate the analog signal.