Digital Fingerprint Circuit Using Fractional Clock Control

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Solution Overview

Problem

Integrated circuits face challenges in generating secure digital fingerprints due to manufacturing deviations, which affect the reliability and uniqueness of their physical unclonable functions (PUFs), making it difficult to ensure secure authentication and encryption.

Innovation Solution

A digital fingerprint generation circuit comprising a control unit, first and second clock generators, and a frequency detector, where the clock generators have different manufacturing deviations and control words with both integer and fraction portions, generating clock signals that increase the number of valid bits in the digital fingerprint, enhancing security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional digital fingerprint generation methods are used, then the implementation is simple, but the security and reliability of the digital fingerprint are insufficient due to manufacturing deviations

Engineering Contradiction:
Improvedigital fingerprint securityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control word is segmented into integer portion and fraction portion, where the integer portion determines the basic clock frequency and the fraction portion compensates for manufacturing deviations. This segmentation allows the system to maintain simplicity while improving reliability by addressing deviation issues through the fraction portion without redesigning the entire circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the parameter of the control word by introducing a fraction portion in addition to the integer portion. This parameter change enables the clock generator to compensate for manufacturing deviations in the PUF circuit, thereby improving digital fingerprint reliability without significantly increasing circuit complexity.

Inventive Principle:
Principle #35Parameter changes

2Loss of information

If the control word only has an integer portion, then the circuit is simple to implement, but the number of valid bits in the digital fingerprint is limited

Engineering Contradiction:
Improvenumber of valid bitsVSAvoidcontrol word structure
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The control word structure is extended from a single integer dimension to two dimensions: integer portion and fraction portion. This dimensional extension allows the system to generate more valid bits in the digital fingerprint by utilizing both portions in the clock generation process, thereby reducing information loss.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If manufacturing deviations are not compensated, then the circuit operation is straightforward, but the uniqueness and reliability of the PUF are affected

Engineering Contradiction:
ImprovePUF uniquenessVSAvoidcontrol mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The fraction portion of the control word acts as a feedback mechanism that compensates for manufacturing deviations. By adjusting the fraction portion based on the actual deviation characteristics, the system maintains PUF uniqueness and reliability without requiring complex real-time feedback circuits.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11893142B2Integrated circuit, and digital fingerprint generation circuit and method thereof
Publication Date: 2024.02.06 BEIJING BOE TECH DEV CO LTD
  • US11893142B2 patent drawing
  • US11893142B2 patent drawing
  • US11893142B2 patent drawing

AI summary

A digital fingerprint generation circuit based on an integrated circuit is provided. In the digital fingerprint generation circuit, a control unit is configured to: generate a first control word and a second control word, and transmit the first control word and the second control word to a first clock generator and a second clock generator respectively, so that the first clock generator generates a first clock signal based on the first control word, and the second clock generator generates a second clock signal based on the second control word; and a frequency detector generates a digital fingerprint of the integrated circuit based on the first clock signal and the second clock signal.