Fractional Delay Pulse Generator for Sub-Clock Edge Placement
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Solution Overview
Problem
Existing pulse generators face limitations in achieving accurate, low jitter edge placement with improved resolution at a low cost, requiring calibration and having complex designs due to the use of analog or hybrid circuits.
Innovation Solution
A pulse generator utilizing a phase accumulator, pulse calculator, and fractional delay filter to generate a pulse waveform with desired pulse width and repetition period by delaying the edges of an intermediate pulse signal by a fraction of the clock cycle, using a low-pass filter with impulse responses that provide variable delays, allowing for precise edge placement without calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital counters are used to determine pulse width and period of repetition, then accuracy and jitter are improved, but edge placement resolution is limited because edges occur coincidentally with clock edges
Solution Approach 1:
The pulse generation process is segmented into two independent digital paths: one path generates pulses with edges aligned to clock edges for accurate timing, while the other path provides fractional delay to improve edge placement resolution. This segmentation allows each path to optimize for its specific function without compromising the other.
Solution Approach 2:
A fractional delay filter is introduced as an intermediary component between the digital counter and the output. This filter receives the intermediate pulse signal and applies precise fractional clock cycle delays to the edges, enabling sub-clock-cycle edge placement resolution while maintaining the accuracy benefits of digital counting.
2Measurement precision
If analog circuits are used to provide fine edge placement resolution, then edge placement resolution is improved, but component tolerances, non-linearity, noise, drift with time and temperature, and calibration requirements worsen accuracy
Solution Approach 1:
The patent replaces analog circuits with digital circuits for edge placement control. Instead of using analog integrators and comparators that are subject to component tolerances and drift, the invention uses digital counters and fractional delay filters implemented in the digital domain, eliminating the reliability issues associated with analog components while maintaining fine edge placement resolution.
Solution Approach 2:
The system changes the operating parameters by working entirely in the digital domain with discrete clock cycles and fractional delays calculated through digital arithmetic. This parameter change from analog continuous control to digital discrete control with fractional precision eliminates the fundamental limitations of analog circuits while achieving the desired resolution.
3Measurement precision
If analog/digital hybrid pulse generators combine digital counters with analog circuits to provide good edge placement resolution, then edge placement resolution is improved, but cost, space, calibration requirements, and drift increase
Solution Approach 1:
The patent merges the pulse width determination and edge placement functions into a unified digital architecture. The phase accumulator and fractional delay filter work together as integrated digital components, eliminating the need for separate analog circuitry and reducing overall system complexity, cost, and space requirements while maintaining high edge placement resolution.
Solution Approach 2:
The fractional delay filter serves multiple functions: it provides fine edge placement resolution, maintains synchronization with the clock signal, and enables both pulse width and period control with the same digital infrastructure. This multi-functionality eliminates the need for dedicated analog circuits and reduces system complexity.
Data Source
AI summary
A digital pulse generator including a fractional delay filter is provided as having a plurality of step response functions that can be selected on a sample by sample basis by selection of filter coefficients. The step response functions are all identical but each have different group delay. Responsive to an input waveform having leading and trailing edges aligned with a system clock, the fractional delay filter can output the impulse responses as a pulse waveform having respective leading and trailing edges delayed by different respective fractions of a signal clock cycle from the respective leading and trailing edges of the input waveform. The pulse waveform as output can thus have desired pulse width and desired period of repetition with finer edge placement resolution of improved accuracy.