Fractional Frequency Divider Circuit for High-Purity Synthesis
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Solution Overview
Problem
Existing frequency synthesizers face challenges in achieving high-resolution frequency synthesis with fractional frequency division, particularly in applications like Bluetooth Low Energy and Internet of Things communications, where ultra-low power consumption and high spectral purity are required.
Innovation Solution
A frequency synthesizer is designed with a controlled oscillator and a frequency dividing circuit that uses a positive binary word and a negative binary word to generate a frequency dividing circuit output signal. The ratio of the frequency dividing circuit output signal frequency to the controlled oscillator output signal frequency is a decimal value greater than zero and less than one, determined by the ratio of the positive binary word to the sum of its value and the absolute value of the negative binary word.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If fractional frequency division is implemented using conventional frequency synthesizers, then frequency resolution is improved, but power consumption increases and spectral purity deteriorates
Solution Approach 1:
The frequency division ratio is segmented into integer and fractional parts, with the fractional part further divided into multiple bits (e.g., 3 bits for 1/8 resolution). This segmentation allows precise frequency control while using simple digital circuitry instead of complex analog components, reducing power consumption.
Solution Approach 2:
The frequency synthesizer dynamically adjusts the frequency division ratio by selectively activating different binary weight circuits (1, 2, 4, 8, etc.) based on the desired fractional value. This dynamic configuration enables high-resolution frequency synthesis without requiring complex fixed-structure dividers.
2Measurement precision
If conventional frequency synthesis methods are used, then frequency resolution is improved, but spectral purity deteriorates
Solution Approach 1:
The patent replaces complex analog frequency division circuits with digital logic circuits. The fractional frequency division is achieved through digital counting and binary-weighted signal selection, eliminating the need for complex analog dividers that generate spurious spectral components.
Solution Approach 2:
The system changes the approach from analog parameter adjustment to digital parameter control. By using digital binary words to control the frequency division ratio, the system achieves high resolution while maintaining clean spectral output, as digital circuits do not introduce the same types of distortion and spurs as analog circuits.
3Measurement precision
If high-resolution frequency synthesis is achieved through conventional means, then frequency precision is improved, but device complexity increases
Solution Approach 1:
The frequency control word is segmented into integer and fractional parts, with the fractional part divided into multiple bits each controlling a specific binary weight. This segmentation allows the use of simple digital AND gates and multiplexers instead of complex frequency dividers, reducing overall circuit complexity while maintaining high precision.
Data Source
AI summary
In various embodiments, a frequency dividing circuit is provided. The frequency dividing circuit may include a first circuit including an m-bit multiplexer configured to receive a positive binary word and a negative binary word as inputs. The frequency dividing circuit may receive a controlled oscillator output signal and a complement of the controlled oscillator output signal, generate a frequency dividing circuit output signal from the controlled oscillator output signal and the complement of the controlled oscillator output signal using the positive binary word and the negative binary word. A ratio of the frequency dividing circuit output signal frequency to the controlled oscillator output signal frequency is a decimal value greater than zero and less than one and is determined using a ratio of a value of the positive binary word to a sum of the value of the positive binary word and an absolute value of the negative binary word.