Fractional DSP Waveform Synthesis for Fixed-Rate DAC Baud Flexibility
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Solution Overview
Problem
Conventional signal sources for data communication applications face challenges in synthesizing waveforms for arbitrary baud rates, requiring time-consuming re-calibration and complex design with high-speed DACs that vary across a full octave in frequency, leading to sensitivity to sample rate changes.
Innovation Solution
The use of digital signal processing (DSP) to synthesize waveforms with an asynchronous or narrowly tunable rate DAC, employing fractional replication/interpolation techniques to up-sample waveforms to the desired baud rate, allowing dynamic changes in waveform baud rates without re-calibration and introducing impairments like jitter for stress testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional synchronous waveform generation with variable sample rate DACs is used to support arbitrary baud rates, then adaptability to different baud rates is improved, but device complexity and calibration requirements increase
Solution Approach 1:
The patent changes the sample rate parameter from variable to fixed, decoupling the DAC sample rate from the baud rate. This allows the DAC to operate at a constant high sample rate while the baud rate varies arbitrarily, resolving the contradiction by making the sample rate parameter independent of the adaptive parameter (baud rate).
Solution Approach 2:
The patent introduces an intermediary processing stage between the baud-rate signal and the fixed sample rate DAC. This intermediary performs resampling or interpolation to convert the variable baud rate signal to the fixed DAC sample rate, enabling arbitrary baud rate support without requiring the DAC itself to be variable.
2Adaptability or versatility
If DAC sample rate is varied across full octave to support different baud rates, then adaptability is improved, but manufacturing precision and stability deteriorate due to sensitivity to sample rate changes
Solution Approach 1:
The patent fixes the DAC sample rate parameter at a constant value, eliminating sample rate variations that cause manufacturing precision issues. The adaptability is achieved through digital signal processing rather than varying the DAC's fundamental operating parameter, thus maintaining manufacturing precision while achieving baud rate flexibility.
3Device complexity
If conventional synchronous synthesis with integer interpolation is used, then device complexity is reduced, but adaptability to arbitrary baud rates deteriorates
Solution Approach 1:
The patent extends the simple integer interpolation approach to fractional interpolation, allowing the interpolation factor to be any rational number rather than just an integer. This maintains the simplicity of the synthesis algorithm while dramatically improving adaptability to arbitrary baud rates that may not have integer relationships with the sample rate.
4Adaptability or versatility
If high-speed DACs with variable sample rate are designed, then adaptability to different baud rates is improved, but ease of manufacture and optimization deteriorate
Solution Approach 1:
The patent changes the DAC from a variable sample rate device to a fixed sample rate device operating at a consistently high rate. This simplifies the manufacturing and optimization process, as the DAC can be designed and tuned for a single operating point rather than requiring complex variable rate control circuits and multiple calibration modes.
Data Source
AI summary
A test and measurement instrument including a digital-to-analog converter having an output sample rate configured to receive a digital sample waveform and a reference clock and output an analog waveform at the sample rate, a waveform synthesizer configured to receive an input waveform having a baud rate and output a digital sample waveform having a baud rate less than the sample rate of the digital-to-analog converter, and a port configured to output the analog waveform.


