Fractional Motion Estimation Engine Parallel Pipelines

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Solution Overview

Problem

Current video coding technologies face challenges in achieving high compression rates while maintaining computational efficiency, particularly in fractional motion estimation which is computationally intensive and power-consuming, especially for high-throughput applications like 4K video encoding.

Innovation Solution

A video encoder design that includes both integer and fractional motion estimation hardware components, with a parallel pipeline architecture for fractional motion estimation to refine motion vectors to sub-pixel accuracy, optimizing processing across multiple pipelines to enhance throughput and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If fractional motion estimation is performed to achieve high compression rates, then video quality and compression efficiency are improved, but computational complexity and power consumption increase

Engineering Contradiction:
Improvemotion vector precisionVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The fractional motion estimation process is divided into multiple stages: integer-level motion estimation first, followed by fractional-level refinement. This segmentation allows the system to perform coarse estimation with simple operations first, then apply complex fractional operations only to selected candidate blocks, reducing overall computational complexity while maintaining high precision motion vectors

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Integer-level motion estimation is performed as a preliminary step before fractional motion estimation. This preliminary action identifies candidate motion vectors and blocks that require further refinement, allowing the computationally intensive fractional estimation to be applied only where necessary, thus reducing total computational complexity while achieving high precision

Inventive Principle:
Principle #10Preliminary action

2Productivity

If parallel processing pipelines are added to increase throughput, then processing speed is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improveencoding throughputVSAvoidhardware architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Multiple parallel processing pipelines are introduced to process different blocks of video data simultaneously. This dimensional expansion from single-threaded to multi-pipeline processing increases throughput by utilizing additional hardware resources in parallel, achieving high-speed encoding for 4K video at 60 fps while distributing the computational load across multiple independent processing units

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If higher compression rates are implemented, then video quality is improved, but computational complexity increases

Engineering Contradiction:
Improvecompression qualityVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The compression process is segmented into integer-level encoding and fractional-level refinement stages. By separating these operations, the system achieves high compression quality through fractional motion estimation while keeping the base encoding process computationally efficient, allowing quality improvements without proportionally increasing overall complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11909993B1Fractional motion estimation engine with parallel code unit pipelines
Publication Date: 2024.02.20 META PLATFORMS INC
  • US11909993B1 patent drawing
  • US11909993B1 patent drawing
  • US11909993B1 patent drawing

AI summary

A video encoder is disclosed. The video encoder comprises an integer level motion estimation hardware component configured to determine candidate integer level motion vectors for a video being encoded. The video encoder comprises a fractional motion estimation hardware component configured to receive the candidate integer level motion vectors from the integer level motion estimation hardware component and refine the candidate integer level motion vectors into candidate sub-pixel level motion vectors. The fractional motion estimation hardware component includes parallel pipelines configured to process coding units of a frame of the video in parallel across the parallel pipelines.