Fractional-N Synthesizer Sigma-Delta Modulator Variable Reference
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Solution Overview
Problem
Conventional Fractional-N frequency synthesizers require different base values and feedback loop circuits for each reference frequency, leading to high space consumption and inefficiency when dealing with variable reference frequencies.
Innovation Solution
A Sigma-Delta modulator with a constant base value is implemented, allowing the frequency synthesizer to support variable reference frequencies by estimating a fractional part, a fractional remainder part, and an integral part, using a controller and base multiplier with a fixed base value to maintain output frequency resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different base values and feedback loop circuits are used for each reference frequency, then the frequency synthesizer can accurately support multiple reference frequencies, but the space consumption increases and efficiency decreases
Solution Approach 1:
The patent implements a universal feedback loop circuit that can handle multiple reference frequencies through a reconfigurable architecture. The circuit uses a single base value in combination with a programmable divider and control logic that adapts the division ratio based on the reference frequency, eliminating the need for separate feedback loops for each frequency while maintaining accurate frequency synthesis across variable reference frequencies
2Device complexity
If a constant base value is used in the sigma-delta modulator, then the circuit complexity is reduced and space is saved, but the ability to maintain output frequency resolution with variable reference frequencies is compromised
Solution Approach 1:
The patent employs a dynamic configuration approach where the sigma-delta modulator uses a constant base value combined with a programmable divider ratio that dynamically adjusts based on the reference frequency. This allows the system to maintain constant circuit complexity while adapting the effective division factor to preserve output frequency resolution across different reference frequencies, resolving the contradiction between fixed circuit design and variable performance requirements
Data Source
AI summary
A frequency synthesizer includes: a phase detector, a loop filter, a controllable oscillator, a frequency divider, and a sigma-delta modulator for providing the division factor according to an integral part and a fractional part. The sigma-delta modulator includes a controller for providing a first digital value, a second digital value and a third digital value; a first adder for combining the second digital value, the third digital value, and a digital feedback value to generate a combination result; a quantizer for quantizing the combination result to generate a quantization value; a second adder for combining the first digital value and the quantization value to generate the division factor; and a multiplier for multiplying the quantization value by a constant multiplication factor; wherein the controller adjusts the third digital value in response to the reference signal for making an output frequency resolution substantially fixed.