Fractional-N PLL Bias Compensation for Stable Loop Bandwidth
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Solution Overview
Problem
Phase-locked loops (PLLs) in frequency modulated continuous wave (FMCW) radar systems face challenges in maintaining consistent loop bandwidth across varying control voltage ranges, leading to phase noise variations and increased power consumption due to non-linear VCO gain (KVCO) changes.
Innovation Solution
The system employs a charge pump current (ICP) variation mechanism, using current-steering digital-to-analog converters (DACs) to adjust bias current provided to the charge pump, increasing or decreasing ICP inversely with KVCO variations across different control voltage ranges, ensuring consistent loop bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the bias current to the charge pump is kept constant, then the circuit design is simple, but the loop bandwidth varies with control voltage leading to phase noise variations
Solution Approach 1:
The patent implements dynamic adjustment of the charge pump bias current based on the control voltage level. The bias current is increased when the control voltage is within a first range and decreased when within a second range, making the previously static parameter dynamic to compensate for VCO gain variations and maintain consistent loop bandwidth.
Solution Approach 2:
The patent changes the bias current parameter of the charge pump based on control voltage ranges. By adjusting this key parameter dynamically, the system compensates for non-linear VCO gain changes and maintains consistent loop bandwidth across different operating conditions without requiring complete circuit redesign.
2Reliability
If the charge pump current is increased to widen loop bandwidth, then loop bandwidth increases, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts charge pump current based on control voltage ranges rather than maintaining a high constant current. This allows the system to achieve consistent loop bandwidth while reducing power consumption during voltage ranges where high current would be unnecessary.
Solution Approach 2:
The bias current parameter is changed based on operating conditions (control voltage ranges). The current is increased only when necessary (first voltage range) and decreased when not needed (second voltage range), optimizing the trade-off between loop bandwidth consistency and power consumption.
Data Source
AI summary
In an example, a system includes a phase-locked loop including a charge pump coupled to a phase frequency detector, a low-pass filter coupled to the charge pump, and a VCO coupled to the low-pass filter, where the charge pump is configured to provide a charge pump current to the low-pass filter. The system also includes a current source configured to provide a bias current to the charge pump. The system includes a first bias compensation circuit configured to increase the bias current responsive to a control voltage provided to the VCO being within a first range. The system also includes a second bias compensation circuit configured to decrease the bias current responsive to the control voltage provided to the VCO being within a second range.


