Fractional-N PLL Modulator for Exact Frequency and Phase
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Solution Overview
Problem
Existing fractional-N frequency synthesizers face limitations in achieving exact output frequencies and phases due to the modulus of the phase accumulator being related to the desired frequency spacing, leading to restricted possible answers and large spurious content.
Innovation Solution
A fractional-N frequency synthesizer with a modulator having a non-integer modulus, where the modulus multiplied by the ratio of the output signal frequency to the reference signal frequency, is used to achieve exact output frequency and phase, incorporating a delta-sigma modulator with a phase accumulator and a greatest common divisor counter to reset the phase accumulator to its initial seed value, reducing spurious content.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the modulus of the phase accumulator is related to the desired frequency spacing, then the frequency spacing can be controlled, but the number of possible output frequencies is restricted and large spurious content is generated
Solution Approach 1:
The division ratio N is segmented into an integer part n and a fractional part K/M, where the fractional part is handled separately by a delta-sigma modulator. This segmentation allows the modulus M to be independent of the frequency spacing requirements, enabling more output frequency options while the modulator manages the fractional division to minimize spurious content
Solution Approach 2:
The invention uses a dynamic modulator (delta-sigma modulator) that continuously adjusts the division ratio based on the accumulated fractional phase error. This dynamic adjustment allows the system to achieve exact output frequencies with reduced spurious content by distributing quantization errors over time rather than using a static modulus-related frequency spacing
2Measurement precision
If a fractional-N synthesizer is used to achieve smaller frequency steps, then frequency resolution is improved, but exact output frequency and phase are difficult to achieve
Solution Approach 1:
A phase accumulator continuously accumulates the fractional division ratio N = n + K/M, and this accumulated phase information is fed back to a modulator that adjusts the instantaneous division ratio. This feedback mechanism ensures that the average division ratio over time is exactly N, achieving both high frequency resolution and exact output frequency
Solution Approach 2:
The phase accumulator performs preliminary integration of the fractional division ratio before the modulator applies the correction. By accumulating the phase error in advance and then correcting it through the modulator, the system achieves exact output frequency while maintaining fine frequency resolution
Data Source
AI summary
A fractional-N frequency synthesizer having an exact output frequency and phase includes a phase locked loop including a phase detector responsive to a reference signal and a fractional divider. The phase locked loop has an output signal whose frequency is a fractional multiple of the input reference signal. The synthesizer also includes a modulator having a modulus for providing an output to the fractional divider, in which the modulus multiplied by the ratio of the frequency of the output signal to the frequency of the reference signal is a non-integer number.