Fractional-N PLL Modulus Tuning for Higher Frequency Resolution
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Solution Overview
Problem
Existing phase locked loops face limitations in achieving high frequency resolution due to constraints in the fractional divider parameters, particularly the modulus parameter, which restricts the smallest frequency increment they can produce.
Innovation Solution
The method involves configuring a fractional division phase locked loop with adjustable modulus and fractional divider parameters, allowing the modulus parameter to be varied while keeping other parameters constant, and using multiple fractional division loops to enhance frequency resolution by increasing the number of controllable parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the modulus parameter in the fractional divider is increased to improve frequency resolution, then the frequency resolution improves, but the device complexity increases
Solution Approach 1:
The patent applies dynamics by making the modulus parameter adjustable and configurable rather than fixed. The fractional divider's modulus parameter can be dynamically changed to optimize frequency resolution for different operating conditions, allowing the system to adapt its precision without permanently increasing hardware complexity.
Solution Approach 2:
The patent directly applies parameter changes by modifying the modulus parameter value in the fractional divider to achieve ultra-high frequency resolution. By changing this key parameter, the system can fine-tune its frequency resolution without adding complex hardware, thus resolving the contradiction between precision and complexity.
2Measurement precision
If the fractional divider parameters are adjusted to achieve higher frequency resolution, then the frequency resolution improves, but the ease of operation deteriorates
Solution Approach 1:
The patent applies universality by designing the fractional divider to handle multiple functions through its configurable parameters. The same hardware structure can achieve different frequency resolutions by simply adjusting the modulus parameter, eliminating the need for multiple specialized circuits and simplifying operation.
Solution Approach 2:
The patent simplifies operation by using parameter changes rather than complex hardware reconfiguration. By adjusting the modulus parameter value, operators can easily achieve different frequency resolution levels without complex setup procedures, maintaining ease of operation while improving precision.
3Measurement precision
If the number of controllable parameters in the fractional divider is increased to improve frequency resolution, then the frequency resolution improves, but the device complexity increases
Solution Approach 1:
The patent applies dynamics by implementing a configurable modulus parameter that can be adjusted based on operational requirements. This dynamic parameter allows the system to achieve ultra-high frequency resolution only when needed, rather than permanently increasing hardware complexity for all operating conditions.
Solution Approach 2:
The patent resolves the contradiction by using parameter changes in the fractional divider's modulus to achieve higher frequency resolution. This software or configuration-based approach avoids the need for additional hardware components, thus improving precision without proportionally increasing device complexity.
Data Source
AI summary
Systems and methods are provided for improving frequency resolution in a phase locked loop having an oscillator and a phase detector. A method comprises receiving a reference signal and generating an output signal having a phase relationship with the reference signal and receiving the output signal at a fractional divider connected between the oscillator and the phase detector in a feedback loop, wherein the fractional divider includes a plurality of configurable parameters. The method also comprises adjusting a value of the modulus parameter to increase frequency resolution.