Fractional-N PLL Pulse Width Correction for Sigma-Delta Noise
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Solution Overview
Problem
Fractional PLLs suffer from noise issues due to clock dividers, which degrade signal-to-noise ratios, and existing solutions require sacrificing loop filter bandwidth to mitigate this noise.
Innovation Solution
The implementation of a pulse width correction circuit between the phase frequency detector and charge pump in a fractional PLL, which corrects pulse signal outputs by delaying the leading edge of pulse signals to remove phase errors introduced by the sigma-delta modulator, while maintaining loop filter bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fractional-N PLL is used to generate non-integer multiple clock frequencies, then frequency flexibility is improved, but noise from the clock divider degrades signal-to-noise ratio
Solution Approach 1:
A sigma-delta modulator is introduced as an intermediary component between the frequency divider and the phase-frequency detector. The modulator converts the fractional division ratio into a sequence of integer division ratios, thereby eliminating the direct source of divider noise while maintaining the desired fractional frequency output. This intermediary transformation resolves the contradiction by decoupling frequency flexibility from noise generation.
Solution Approach 2:
The invention changes the division ratio parameter from a static fractional value to a dynamically varying integer sequence generated by the sigma-delta modulator. By modulating the integer divide ratio N according to the fractional requirement and filtering the resulting phase errors, the system achieves fractional frequency division without the noise penalties of direct fractional division.
2Object-affected harmful factors
If loop filter bandwidth is reduced to mitigate divider noise, then noise is suppressed, but loop response speed and stability are compromised
Solution Approach 1:
The sigma-delta modulator acts as a noise-shaping intermediary that pushes divider quantization noise to higher frequencies outside the loop bandwidth. This allows the loop filter to maintain a wider bandwidth for fast response while naturally attenuating the shaped noise spectrum, resolving the trade-off between noise suppression and response speed.
Solution Approach 2:
The sigma-delta modulator employs periodic oversampling and noise shaping that distributes quantization errors across a wide frequency spectrum. By concentrating noise energy at frequencies beyond the loop bandwidth through periodic modulation, the system achieves effective noise suppression without requiring a narrow loop filter bandwidth, thus maintaining fast response characteristics.
Data Source
AI summary
An apparatus is disclosed that includes a phase detector circuit for generating a first pulse signal based on first and second input clock signals. A first circuit adjusts the first pulse signal by delaying transmission of a leading edge of the first pulse signal, but not a trailing edge of the first pulse signal. A charge pump circuit charges or discharges a capacitor based on the adjusted first pulse signal, and a voltage controlled oscillator (VCO) circuit generates an output clock signal with a frequency that depends on a voltage on the capacitor.