Fractional PWM LED Driving With Multiphase Clock Resolution

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Solution Overview

Problem

Small, high-resolution LED displays face challenges in driving more pixels at higher resolutions, leading to longer rise times and non-uniformity due to decreased current and parasitic resistance, inductance, and capacitance variations, which require higher PWM pulse resolution and faster clock frequencies, increasing power consumption and hardware costs.

Innovation Solution

A system and method for generating PWM pulses using a multiphase clock system, including a demultiplexer to separate PWM data into integer and fraction sections, a pulse generator, sampler, multiplexer, and fraction logic circuit to produce fraction PWM pulses, which increase resolution without raising clock frequency, and current sources to drive LEDs with these pulses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a higher clock frequency is used to achieve higher PWM pulse resolution, then the PWM pulse resolution is improved, but the power consumption increases and advanced hardware is required

Engineering Contradiction:
ImprovePWM pulse resolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The PWM data is segmented into integer portion and fraction portion, which are processed separately through different circuit paths. The integer portion controls the basic PWM pulse width while the fraction portion provides fine-grained adjustment, enabling high resolution without requiring a proportionally high clock frequency for the entire system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension by using multiple clock phases (e.g., 4-phase clock) to generate PWM pulses. Instead of relying solely on increasing clock frequency, the system utilizes phase information to achieve higher effective resolution, allowing the PWM resolution to exceed what would be possible with a single-phase clock at the same frequency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If a higher clock frequency is used to achieve higher PWM pulse resolution, then the PWM pulse resolution is improved, but advanced and costly hardware is required

Engineering Contradiction:
ImprovePWM pulse resolutionVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The PWM data is segmented into integer portion and fraction portion, which are processed separately through different circuit paths. The integer portion controls the basic PWM pulse width while the fraction portion provides fine-grained adjustment, enabling high resolution without requiring a proportionally high clock frequency for the entire system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension by using multiple clock phases (e.g., 4-phase clock) to generate PWM pulses. Instead of relying solely on increasing clock frequency, the system utilizes phase information to achieve higher effective resolution, allowing the PWM resolution to exceed what would be possible with a single-phase clock at the same frequency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of energy

If the driving current is reduced due to increased LED light efficiency, then the LED light efficiency is improved, but the rise time of the LEDs becomes longer

Engineering Contradiction:
ImproveLED light efficiencyVSAvoidrise time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The patent implements dynamic PWM pulse width adjustment by combining integer and fraction portions of PWM data. This allows the system to optimize the PWM pulse width in real-time to compensate for the longer rise time caused by reduced driving current, ensuring that LEDs reach their target brightness levels within the available display period even with lower current drive.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11039517B2Fraction PWM with multiple phase display clock
Publication Date: 2021.06.15 SCT
  • US11039517B2 patent drawing
  • US11039517B2 patent drawing
  • US11039517B2 patent drawing

AI summary

A method for generating fractional PWM pulses to drive an light emitting device includes generating multiphase clock signals using a multiphase PLL or DLL includes the steps of generating a plurality of phases of PWM pulses that correspond to a number of phases of the multiphase clock signals, selecting two or more phases amongst the plurality of PWM pulses, performing logic operations of the selected phases of PWM pulses to generate fractional PWM pulses, and generating a driving current using the fractional PWM pulses in a current source. The light emitting device is can be an LED display comprising an LED array having a plurality of channels and a plurality of scan lines. The driving current drives LEDs in one of the plurality of channels.